Patents by Inventor Ali Sazegari
Ali Sazegari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200225958Abstract: In an embodiment, a computation engine may perform dot product computations on input vectors. The dot product operation may have a first operand and a second operand, and the dot product may be performed on a subset of the vector elements in the first operand and each of the vector elements in the second operand. The subset of vector elements may be separated in the first operand by a stride that skips one or more elements between each element to which the dot product operation is applied. More particularly, in an embodiment, the input operands of the dot product operation may be a first vector having second vectors as elements, and the stride may select a specified element of each second vector.Type: ApplicationFiled: April 1, 2020Publication date: July 16, 2020Inventors: Tal Uliel, Eric Bainville, Jeffry E. Gonion, Ali Sazegari, PhD
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Patent number: 10699622Abstract: A data processing system can store a long-term history of pixel luminance values in a secure memory and use those values to create burn-in compensation values that are used to mitigate burn-in effect on a display. The long-term history can be updated over time with new, accumulated pixel luminance values.Type: GrantFiled: January 18, 2018Date of Patent: June 30, 2020Assignee: APPLE INC.Inventors: Ross Thompson, Guy Cote, Christopher P. Tann, Jerrold V. Hauck, Ian C. Hendry, Vanessa C. Heppolette, Adam J. Machalek, Alan M. Dunn, Ali Sazegari, Lars M. Lindberg, Arthur L. Spence
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Patent number: 10652583Abstract: A hybrid compression method for compressing images is provided. The method identifies a first set of image components to be compressed by a lossy compression format and a second set of image components to be compressed by a lossless compression format. The method then encodes the first set of image components according to the lossy compression format and encodes the second set of image components according to the lossless compression format. The method then generates a compressed structure that includes the lossy-compressed first set of image components and the lossless-compressed second set of image components.Type: GrantFiled: August 19, 2016Date of Patent: May 12, 2020Assignee: Apple Inc.Inventors: Paul Chang, Ali Sazegari, Eric Bainville
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Patent number: 10642620Abstract: In an embodiment, a computation engine may perform dot product computations on input vectors. The dot product operation may have a first operand and a second operand, and the dot product may be performed on a subset of the vector elements in the first operand and each of the vector elements in the second operand. The subset of vector elements may be separated in the first operand by a stride that skips one or more elements between each element to which the dot product operation is applied. More particularly, in an embodiment, the input operands of the dot product operation may be a first vector having second vectors as elements, and the stride may select a specified element of each second vector.Type: GrantFiled: April 5, 2018Date of Patent: May 5, 2020Assignee: Apple Inc.Inventors: Tal Uliel, Eric Bainville, Jeffry E. Gonion, Ali Sazegari
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Patent number: 10599427Abstract: A novel software updating method is provided. A target file is divided into segments, where some segments are updated by patching, while other segments are updated by archiving. The segmentation of the update allows very large files such as DYLD shared caches to be patched in-place, i.e., by using free space available within the file to perform patching rather than requiring enough free space on disk to store both the new version and the old version of the file. The segmentation of the update also allows each segment to be updated individually by the most optimal update method (copy, patch, or archive) so that the size of the update file can be minimized.Type: GrantFiled: April 17, 2018Date of Patent: March 24, 2020Assignee: Apple Inc.Inventors: Eric Bainville, Ali Sazegari
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Patent number: 10602183Abstract: Disclosed herein are techniques for pre-processing a multiple-channel image for compression. The multiple-channel image can be composed of a collection of pixels that are represented using a floating-point format (e.g., half-precision/16-bit) for display on devices optimized for wide-gamut color space. The techniques can include a first step of quantizing the pixels into a fixed range of values, and applying invertible color-space transformations to the sub-pixels of each pixel—which can include red, green, blue, and alpha sub-pixels—to produce transformed sub-pixels including luma and chroma values. Next, the luma sub-pixels are placed into a luma data stream, the first and second chroma values are placed into a chroma data stream, and the alpha sub-pixels are placed into an alpha data stream. Predictive functions are then applied to the luma and chroma data streams. Finally, the various streams are separated into buffers and compressed to produce a multiple-channel image.Type: GrantFiled: July 13, 2018Date of Patent: March 24, 2020Assignee: Apple Inc.Inventors: Lars M. Lindberg, Ali Sazegari
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Patent number: 10592239Abstract: In an embodiment, a matrix computation engine is configured to perform matrix computations (e.g. matrix multiplications). The matrix computation engine may perform numerous matrix computations in parallel, in an embodiment. More particularly, the matrix computation engine may be configured to perform numerous multiplication operations in parallel on input matrix elements, generating resulting matrix elements. In an embodiment, the matrix computation engine may be configured to accumulate results in a result memory, performing multiply-accumulate operations for each matrix element of each matrix.Type: GrantFiled: May 28, 2019Date of Patent: March 17, 2020Assignee: Apple Inc.Inventors: Eric Bainville, Tal Uliel, Erik Norden, Jeffry E. Gonion, Ali Sazegari
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Publication number: 20200034145Abstract: In an embodiment, a computation engine is configured to perform vector multiplications, producing either vector results or outer product (matrix) results. The instructions provided to the computation engine specify a matrix mode or a vector mode for the instructions. The computation engine performs the specified operation. The computation engine may perform numerous computations in parallel, in an embodiment. In an embodiment, the instructions may also specify an offset with the input memories, providing additional flexibility in the location of operands. More particularly, the computation engine may be configured to perform numerous multiplication operations in parallel and to accumulate results in a result memory, performing multiply-accumulate operations for each matrix/vector element in the targeted locations of the output memory.Type: ApplicationFiled: July 24, 2018Publication date: January 30, 2020Inventors: Eric Bainville, Jeffry E. Gonion, Ali Sazegari, Gerard R. Williams, III
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Patent number: 10546044Abstract: This application relates to an optimization for a technique for filtering an input signal according to a convolution kernel that is stored in a floating point format. A method for filtering the input signal includes: receiving a set of filter coefficients that define the convolution kernel; determining an order for a plurality of floating point operations configured to generate an element of an output signal; and filtering the input signal by the convolution kernel to generate the output signal. Each floating point operation corresponds with a particular filter coefficient, and the order for the plurality of floating point operations is determined based on a magnitude of the particular filter coefficient associated with each floating point operation. The filtering is performed by executing the plurality of floating point operations according to the order. The data path can be a half-precision floating point data path implemented on a processor.Type: GrantFiled: July 13, 2018Date of Patent: January 28, 2020Assignee: Apple Inc.Inventors: Lars M. Lindberg, Ali Sazegari, Paul S. Chang
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Publication number: 20190384803Abstract: In one embodiment, a computer-implemented method of discrete Fourier transform (DPT), FFT, or DCT computations on a system comprising a processor is described herein. In one example, the method includes receiving, with the processor, input complex samples from memory of the system, determining input vectors based on the received input complex samples, determining a DFT radix p of p macro blocks based on the input vectors, determining p independent DFT-L vectors based on the p macro blocks with L being based on p, and generating p DFT-N output vectors without reordering or shuffling output data based on the p independent DFT-L vectors.Type: ApplicationFiled: September 27, 2018Publication date: December 19, 2019Inventors: CHRIS C. LEE, ALI SAZEGARI
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Publication number: 20190373283Abstract: Disclosed herein are techniques for pre-processing a multiple-channel image for compression. The multiple-channel image can be composed of a collection of pixels that are represented using a floating-point format (e.g., half-precision/16-bit) for display on devices optimized for wide-gamut color space. The techniques can include a first step of quantizing the pixels into a fixed range of values, and applying invertible color-space transformations to the sub-pixels of each pixel—which can include red, green, blue, and alpha sub-pixels—to produce transformed sub-pixels including luma and chroma values. Next, the luma sub-pixels are placed into a luma data stream, the first and second chroma values are placed into a chroma data stream, and the alpha sub-pixels are placed into an alpha data stream. Predictive functions are then applied to the luma and chroma data streams. Finally, the various streams are separated into buffers and compressed to produce a multiple-channel image.Type: ApplicationFiled: July 13, 2018Publication date: December 5, 2019Inventors: Lars M. LINDBERG, Ali SAZEGARI
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Publication number: 20190354568Abstract: This application relates to an optimization for a technique for filtering an input signal according to a convolution kernel that is stored in a floating point format. A method for filtering the input signal includes: receiving a set of filter coefficients that define the convolution kernel; determining an order for a plurality of floating point operations configured to generate an element of an output signal; and filtering the input signal by the convolution kernel to generate the output signal. Each floating point operation corresponds with a particular filter coefficient, and the order for the plurality of floating point operations is determined based on a magnitude of the particular filter coefficient associated with each floating point operation. The filtering is performed by executing the plurality of floating point operations according to the order. The data path can be a half-precision floating point data path implemented on a processor.Type: ApplicationFiled: July 13, 2018Publication date: November 21, 2019Inventors: Lars M. LINDBERG, Ali SAZEGARI, Paul S. CHANG
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Publication number: 20190310855Abstract: In an embodiment, a computation engine may perform dot product computations on input vectors. The dot product operation may have a first operand and a second operand, and the dot product may be performed on a subset of the vector elements in the first operand and each of the vector elements in the second operand. The subset of vector elements may be separated in the first operand by a stride that skips one or more elements between each element to which the dot product operation is applied. More particularly, in an embodiment, the input operands of the dot product operation may be a first vector having second vectors as elements, and the stride may select a specified element of each second vector.Type: ApplicationFiled: April 5, 2018Publication date: October 10, 2019Inventors: Tal Uliel, Eric Bainville, Jeffry E. Gonion, Ali Sazegari
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Publication number: 20190310854Abstract: In an embodiment, a computation engine may perform computations on input vectors having vector elements of a first precision and data type. The computation engine may convert the vector elements from the first precision to a second precision and may also interleave the vector elements as specified by an instruction issued by the processor to the computation engine. The interleave may be based on a ratio of a result precision and the second precision. An extract instruction may be supported to extract results from the computations and convert and deinterleave the vector elements to to provide a compact result in a desired order.Type: ApplicationFiled: April 5, 2018Publication date: October 10, 2019Inventors: Eric Bainville, Tal Uliel, Jeffry E. Gonion, Ali Sazegari, Erik K. Norden
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Publication number: 20190294541Abstract: Systems, apparatuses, and methods for efficiently moving data for storage and processing are described. In various embodiments, a compression unit within a processor includes multiple hardware lanes, selects two or more input words to compress, and for assigns them to two or more of the multiple hardware lanes. As each assigned input word is processed, each word is compared to an entry of a plurality of entries of a table. If it is determined that each of the assigned input words indexes the same entry of the table, the hardware lane with the oldest input word generates a single read request for the table entry and the hardware lane with the youngest input word generates a single write request for updating the table entry upon completing compression. Each hardware lane generates a compressed packet based on its assigned input word.Type: ApplicationFiled: June 10, 2019Publication date: September 26, 2019Inventors: Ali Sazegari, Charles E. Tucker, Jeffry E. Gonion, Gerard R. Williams, III, Chris Cheng-Chieh Lee
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Publication number: 20190294441Abstract: In an embodiment, a matrix computation engine is configured to perform matrix computations (e.g. matrix multiplications). The matrix computation engine may perform numerous matrix computations in parallel, in an embodiment. More particularly, the matrix computation engine may be configured to perform numerous multiplication operations in parallel on input matrix elements, generating resulting matrix elements. In an embodiment, the matrix computation engine may be configured to accumulate results in a result memory, performing multiply-accumulate operations for each matrix element of each matrix.Type: ApplicationFiled: May 28, 2019Publication date: September 26, 2019Inventors: Eric Bainville, Tal Uliel, Erik Norden, Jeffry E. Gonion, Ali Sazegari
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Publication number: 20190250917Abstract: In an embodiment, a computation engine may offload a processor (e.g. a CPU) and efficiently perform transcendental functions. The computation engine may implement a range instruction that may be included in a program being executed by the CPU. The CPU may dispatch the range instruction to the computation engine. The range instruction may take an input operand (that is to be evaluated in a transcendental function, for example) and may reference a range table that defines a set of ranges for the transcendental function. The range instruction may identify one of the set of ranges that includes the input operand. For example, the range instruction may output an interval number identifying which interval of an overall set of valid input values contains the input operand. In an embodiment, the range instruction may take an input vector operand and output a vector of interval identifiers.Type: ApplicationFiled: February 14, 2018Publication date: August 15, 2019Inventors: O-Cheng Chang, Tal Uliel, Eric Bainville, Jeffry E. Gonion, Ali Sazegari
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Patent number: 10362325Abstract: Disclosed are techniques for pre-processing an image for compression, e.g., one that includes a plurality of pixels, where each pixel is composed of sub-pixels that include at least an alpha sub-pixel. First, the alpha sub-pixels are separated into a first data stream. Next, invertible transformations are applied to the remaining sub-pixels to produce transformed sub-pixels. Next, for each row of the pixels: (i) identifying a predictive function that yields a smallest prediction differential total for the row, (ii) providing an identifier of the predictive function to a second data stream, and (iii) converting the transformed sub-pixels of the pixels in the row into prediction differentials based on the predictive function. Additionally, the prediction differentials for each of the pixels are encoded into first and second bytes that are provided to third and fourth data streams, respectively. In turn, the various data streams are compressed into a compressed image.Type: GrantFiled: May 31, 2018Date of Patent: July 23, 2019Assignee: Apple Inc.Inventors: Lars M. Lindberg, Paul S. Chang, Ali Sazegari
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Patent number: 10362319Abstract: Disclosed are techniques for pre-processing an image for compression, e.g., one that includes a plurality of pixels, where each pixel is composed of sub-pixels that include at least an alpha sub-pixel. First, the alpha sub-pixels are separated into a first data stream. Next, invertible transformations are applied to the remaining sub-pixels to produce transformed sub-pixels. Next, for each row of the pixels: (i) identifying a predictive function that yields a smallest prediction differential total for the row, (ii) providing an identifier of the predictive function to a second data stream, and (iii) converting the transformed sub-pixels of the pixels in the row into prediction differentials based on the predictive function. Additionally, the prediction differentials for each of the pixels are encoded into first and second bytes that are provided to third and fourth data streams, respectively. In turn, the various data streams are compressed into a compressed image.Type: GrantFiled: July 31, 2017Date of Patent: July 23, 2019Assignee: Apple Inc.Inventors: Lars M. Lindberg, Paul S. Chang, Ali Sazegari
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Patent number: 10346163Abstract: In an embodiment, a matrix computation engine is configured to perform matrix computations (e.g. matrix multiplications). The matrix computation engine may perform numerous matrix computations in parallel, in an embodiment. More particularly, the matrix computation engine may be configured to perform numerous multiplication operations in parallel on input matrix elements, generating resulting matrix elements. In an embodiment, the matrix computation engine may be configured to accumulate results in a result memory, performing multiply-accumulate operations for each matrix element of each matrix.Type: GrantFiled: November 1, 2017Date of Patent: July 9, 2019Assignee: Apple Inc.Inventors: Eric Bainville, Tal Uliel, Erik Norden, Jeffry E. Gonion, Ali Sazegari