Abstract: Two microprogrammed processors of identical hardware and software facilities are synchronously operated for exchange operations with a plurality of external store and peripheral units. The exchange connections from the processors to the external units pass through gate circuits one of which only is operative at a time. Each processor has an output at which all processed words, whether instructions, microinstructions, operands or results are successively available. Comparator means permanently compare such words from the two processors and, when a mismatch occurs, block the gate circuits and their own comparison outputs and control execution in both processors of a failure detection and check up routine. Each processor includes exchange control claiming and exchange control disclaiming outputs.