Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having a charge-balanced inter-trench structure. Such a device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type. The device also includes first and second control trenches extending through an inversion region having the second conductivity type into the drift region, each of the first and second control trenches being bordered by a cathode diffusion having the first conductivity type. In addition, the device includes an inter-trench structure situated in the drift region between the first and second control trenches.

Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having a deep charge-balanced structure. Such a device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type. The device also includes a control trench extending through an inversion region having the second conductivity type into the drift region, and bordered by a cathode diffusion having the first conductivity type. In addition, the device includes a deep sub-trench structure situated under the control trench. The deep sub-trench structure includes one or more first conductivity regions having the first conductivity type and one or more second conductivity region having the second conductivity type, the one or more first conductivity regions and the one or more second conductivity regions configured to substantially charge-balance the deep sub-trench structure.

Abstract: There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) having a deep superjunction structure. Such an IGBT includes a drift region having a first conductivity type situated over a collector having a second conductivity type. The IGBT also includes a gate trench extending through a base having the second conductivity type into the drift region. In addition, the IGBT includes a deep superjunction structure situated under the gate trench. The deep superjunction structure includes one or more first conductivity regions having the first conductivity type and two or more second conductivity region having the second conductivity type, the one or more first conductivity regions and the two or more second conductivity regions configured to substantially charge-balance the deep superjunction structure.