Patents by Inventor Alireza MOJAB

Alireza MOJAB has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113210
    Abstract: Bi-directional trench power switches. At least one example is a semiconductor device comprising: an upper base region associated with a first side of a substrate of semiconductor material; an upper-CE trench defined on the first side, the upper-CE trench defines a proximal opening at the first side and a distal end within the substrate; an upper collector-emitter region disposed at the distal end of the upper-CE trench; a lower base region associated with a second side of substrate; and a lower collector-emitter region associated with the second side.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 4, 2024
    Applicant: IDEAL POWER INC.
    Inventors: Jiankang BU, Constantin BULUCEA, Alireza MOJAB, Jeffrey KNAPP, Robert Daniel BRDAR
  • Publication number: 20240113115
    Abstract: A semiconductor die includes: a silicon substrate; a trench gate NMOS transistor formed in a first device region of the silicon substrate; a trench gate PMOS transistor formed in a second device region of the silicon substrate and electrically connected to the trench gate NMOS transistor; and an isolation structure interposed between the first device region and the second device region. Methods of monolithically integrating the trench gate NMOS transistor and the trench gate PMOS transistor in the same semiconductor die are also described.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Inventors: Harsh Naik, Timothy Henson, Honghai He, Robert Haase, Ashita Mirchandani, Alireza Mojab
  • Patent number: 11888030
    Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: conducting a first load current from an upper terminal of the power module to an upper-main lead of the transistor, through the transistor, and from a lower-main lead of the transistor to a lower terminal of the power module; and then responsive assertion of a first interrupt signal, interrupting the first load current from the lower-main lead to the lower terminal by opening a lower-main FET and commutating a first shutoff current through a lower-control lead the transistor to the lower terminal; and blocking current from the upper terminal to the lower terminal by the transistor.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: January 30, 2024
    Assignee: IDEAL POWER INC.
    Inventors: John Wood, Alireza Mojab, Daniel Brdar, Ruiyang Yu
  • Patent number: 11881525
    Abstract: Bi-directional trench power switches. At least one example is a semiconductor device comprising: an upper base region associated with a first side of a substrate of semiconductor material; an upper-CE trench defined on the first side, the upper-CE trench defines a proximal opening at the first side and a distal end within the substrate; an upper collector-emitter region disposed at the distal end of the upper-CE trench; a lower base region associated with a second side of substrate; and a lower collector-emitter region associated with the second side.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: January 23, 2024
    Assignee: IDEAL POWER INC.
    Inventors: Jiankang Bu, Constantin Bulucea, Alireza Mojab, Jeffrey Knapp, Robert Daniel Brdar
  • Patent number: 11804835
    Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: injecting charge carriers at a first rate into an upper base of the transistor, the injecting at the first rate results in current flow through the transistor from an upper collector-emitter to a lower collector-emitter, and the current flow results in first voltage drop measured across the upper collector-emitter and the lower collector-emitter; and then, within a predetermined period of time before the end of a first conduction period of the transistor, injecting charge carriers into the upper base at a second rate lower than the first rate, the injecting at the second rate results in second voltage drop measured across the upper collector-emitter and the lower collector-emitter, the second voltage drop higher than the first voltage drop; and then making the transistor non-conductive at the end of the conduction period.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: October 31, 2023
    Assignee: IDEAL POWER INC.
    Inventor: Alireza Mojab
  • Patent number: 11777018
    Abstract: Layout to reduce current crowding at endpoints. At least one example is a semiconductor device comprising: an emitter region defining an inner boundary in the shape of an obround with parallel sides, and the obround having hemispherical ends each having a radius; a base region having a first end, a second end opposite the first end, and base length, the base region disposed within the obround with the base length parallel to and centered between the parallel sides, the first end spaced apart from the first hemispherical end by a first gap greater than the radius, and the second end spaced apart from the second hemispherical ends by a second gap greater than the radius.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: October 3, 2023
    Assignee: IDEAL POWER INC.
    Inventors: Richard A. Blanchard, Alireza Mojab
  • Publication number: 20230066664
    Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: conducting a first load current from an upper terminal of the power module to an upper-main lead of the transistor, through the transistor, and from a lower-main lead of the transistor to a lower terminal of the power module; and then responsive assertion of a first interrupt signal, interrupting the first load current from the lower-main lead to the lower terminal by opening a lower-main FET and commutating a first shutoff current through a lower-control lead the transistor to the lower terminal; and blocking current from the upper terminal to the lower terminal by the transistor.
    Type: Application
    Filed: November 9, 2022
    Publication date: March 2, 2023
    Applicant: IDEAL POWER INC.
    Inventors: Alireza MOJAB, Daniel BRDAR, Ruiyang YU
  • Publication number: 20230048984
    Abstract: Bi-directional trench power switches. At least one example is a semiconductor device comprising: an upper base region associated with a first side of a substrate of semiconductor material; an upper-CE trench defined on the first side, the upper-CE trench defines a proximal opening at the first side and a distal end within the substrate; an upper collector-emitter region disposed at the distal end of the upper-CE trench; a lower base region associated with a second side of substrate; and a lower collector-emitter region associated with the second side.
    Type: Application
    Filed: August 10, 2022
    Publication date: February 16, 2023
    Applicant: IDEAL POWER INC.
    Inventors: Jiankang BU, Constantin BULUCEA, Alireza MOJAB, Jeffrey KNAPP, Robert Daniel BRDAR
  • Patent number: 11522051
    Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: conducting a first load current from an upper terminal of the power module to an upper collector-emitter of the transistor, through the transistor, and from a lower collector-emitter to a lower terminal of the power module; and then responsive assertion of a first interrupt signal, interrupting the first load current from the lower collector-emitter to the lower terminal by opening a lower-main FET and thereby commutating a first shutoff current through a lower base of the transistor to the lower terminal; and blocking current from the upper terminal to the lower terminal by the transistor.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: December 6, 2022
    Assignee: IDEAL POWER INC.
    Inventors: Alireza Mojab, Daniel Brdar, Ruiyang Yu
  • Patent number: 11496129
    Abstract: Current sharing among bidirectional double-base bipolar junction transistors. One example is a method comprising: conducting current through a first bidirectional double-base bipolar junction transistor (first B-TRAN); conducting current through a second B-TRAN the second B-TRAN coupled in parallel with the first B-TRAN; measuring a value indicative of conduction of the first B-TRAN, and measuring a value indicative of conduction of the second B-TRAN; and adjusting a current flow through the first B-TRAN, the adjusting responsive to the value indicative of conduction of the first B-TRAN being different than the value indicative of conduction of the second B-TRAN.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: November 8, 2022
    Assignee: IDEAL POWER INC.
    Inventor: Alireza Mojab
  • Patent number: 11411557
    Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: injecting charge carriers at a first rate into an upper base of the transistor, the injecting at the first rate results in current flow through the transistor from an upper collector-emitter to a lower collector-emitter, and the current flow results in first voltage drop measured across the upper collector-emitter and the lower collector-emitter; and then, within a predetermined period of time before the end of a first conduction period of the transistor, injecting charge carriers into the upper base at a second rate lower than the first rate, the injecting at the second rate results in second voltage drop measured across the upper collector-emitter and the lower collector-emitter, the second voltage drop higher than the first voltage drop; and then making the transistor non-conductive at the end of the conduction period.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: August 9, 2022
    Assignee: Ideal Power Inc.
    Inventor: Alireza Mojab
  • Publication number: 20220190115
    Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: conducting a first load current from an upper terminal of the power module to an upper collector-emitter of the transistor, through the transistor, and from a lower collector-emitter to a lower terminal of the power module; and then responsive assertion of a first interrupt signal, interrupting the first load current from the lower collector-emitter to the lower terminal by opening a lower-main FET and thereby commutating a first shutoff current through a lower base of the transistor to the lower terminal; and blocking current from the upper terminal to the lower terminal by the transistor.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 16, 2022
    Applicant: IDEAL POWER INC.
    Inventors: Alireza MOJAB, Daniel BRDAR
  • Publication number: 20220157974
    Abstract: Layout to reduce current crowding at endpoints. At least one example is a semiconductor device comprising: an emitter region defining an inner boundary in the shape of an obround with parallel sides, and the obround having hemispherical ends each having a radius; a base region having a first end, a second end opposite the first end, and base length, the base region disposed within the obround with the base length parallel to and centered between the parallel sides, the first end spaced apart from the first hemispherical end by a first gap greater than the radius, and the second end spaced apart from the second hemispherical ends by a second gap greater than the radius.
    Type: Application
    Filed: November 10, 2021
    Publication date: May 19, 2022
    Applicant: IDEAL POWER INC.
    Inventors: Richard A. BLANCHARD, Alireza MOJAB
  • Publication number: 20220077852
    Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: injecting charge carriers at a first rate into an upper base of the transistor, the injecting at the first rate results in current flow through the transistor from an upper collector-emitter to a lower collector-emitter, and the current flow results in first voltage drop measured across the upper collector-emitter and the lower collector-emitter; and then, within a predetermined period of time before the end of a first conduction period of the transistor, injecting charge carriers into the upper base at a second rate lower than the first rate, the injecting at the second rate results in second voltage drop measured across the upper collector-emitter and the lower collector-emitter, the second voltage drop higher than the first voltage drop; and then making the transistor non-conductive at the end of the conduction period.
    Type: Application
    Filed: November 19, 2021
    Publication date: March 10, 2022
    Applicant: IDEAL POWER INC.
    Inventor: Alireza MOJAB
  • Publication number: 20210384900
    Abstract: Current sharing among bidirectional double-base bipolar junction transistors. One example is a method comprising: conducting current through a first bidirectional double-base bipolar junction transistor (first B-TRAN); conducting current through a second B-TRAN the second B-TRAN coupled in parallel with the first B-TRAN; measuring a value indicative of conduction of the first B-TRAN, and measuring a value indicative of conduction of the second B-TRAN; and adjusting a current flow through the first B-TRAN, the adjusting responsive to the value indicative of conduction of the first B-TRAN being different than the value indicative of conduction of the second B-TRAN.
    Type: Application
    Filed: June 7, 2021
    Publication date: December 9, 2021
    Applicant: IDEAL POWER INC.
    Inventor: Alireza MOJAB
  • Publication number: 20210359678
    Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: injecting charge carriers at a first rate into an upper base of the transistor, the injecting at the first rate results in current flow through the transistor from an upper collector-emitter to a lower collector-emitter, and the current flow results in first voltage drop measured across the upper collector-emitter and the lower collector-emitter; and then, within a predetermined period of time before the end of a first conduction period of the transistor, injecting charge carriers into the upper base at a second rate lower than the first rate, the injecting at the second rate results in second voltage drop measured across the upper collector-emitter and the lower collector-emitter, the second voltage drop higher than the first voltage drop; and then making the transistor non-conductive at the end of the conduction period.
    Type: Application
    Filed: May 11, 2021
    Publication date: November 18, 2021
    Applicant: IDEAL POWER INC.
    Inventor: Alireza MOJAB