Abstract: The exemplary embodiments provide a parallel implementation of filters with recursive transfer functions. This can enable a filter to act as a frame filter that may process a frame of multiple samples of data in parallel rather than being limited to processing a single sample of data at a time. Each frame contains plural input samples of data values. The input samples are from a common source and have a time dependency. The exemplary embodiments are suitable for implementing various types of filters in parallel, such as cascaded integrator comb filters, biquad filters and other types of infinite impulse response (IIR) filters. The exemplary embodiments may use polyphase decomposition to decompose a filter with a recursive transfer function into multiple polyphase component filters. The polyphase component filters may be applied to respective samples of data in a parallel pipelined configuration to produce filtered output for the samples of data in parallel.

Abstract: A device determines a portion of data generated by a technical computing environment (TCE) program, where the portion of the data is determined based on an initial availability of a resource of a server device. The device provides the portion of the data to the server device for execution, and receives, from the server device, results associated with execution of the portion of the data. The device calculates an availability of the resource based on the results associated with execution of the portion of the data, and provides, to the server device for execution, additional data generated by the TCE program, where the additional data is determined based on the availability of the resource of the server device. The device receives, from the server device, results associated with execution of the additional data, where the receiving is performed by the device.

Abstract: An algorithm and architecture are disclosed for performing multi-argument associative operations. The algorithm and architecture can be used to schedule operations on multiple facilities for computations or can be used in the development of a model in a modeling environment. The algorithm and architecture resulting from the algorithm use the latency of the components that are used to process the associative operations. The algorithm minimizes the number of components necessary to produce an output of multi-argument associative operations and also can minimize the number of inputs each component receives.

Abstract: An algorithm and architecture are disclosed for performing multi-argument associative operations. The algorithm and architecture can be used to schedule operations on multiple facilities for computations or can be used in the development of a model in a modeling environment. The algorithm and architecture resulting from the algorithm use the latency of the components that are used to process the associative operations. The algorithm minimizes the number of components necessary to produce an output of multi-argument associative operations and also can minimize the number of inputs each component receives.