Abstract: A photonic circuit with at least one nonlinear amplitude thresholder for correcting errors produced by linear photonic logic. One or more photonic input gates of the photonic circuit receive one or more input signals and generate one or more photonic signals based on the one or more photonic input signals. A first set of one or more photonic gates of the photonic circuit generates one or more intermediate photonic signals based on the one or more photonic signals. The at least one nonlinear amplitude thresholder generates at least one photonic thresholding signal based on the one or more intermediate photonic signals, the at least one nonlinear amplitude thresholder operating in a first operating regime, second operating regime, and/or third operating regime. A second set of one or more photonic gates of the photonic circuit generates one or more photonic output signals based on the at least one photonic thresholding signal.

Abstract: A photonic circuit with at least one semiconductor optical amplifier-based amplitude thresholder for correcting bit errors. The photonic circuit further includes a first cascaded series of one or more photonic components and a second cascaded series of one or more photonic components that is coupled to the at least one amplitude thresholder. The first cascaded series of one or more photonic components generates one or more intermediate photonic output signals based on one or more received photonic input signals. The at least one amplitude thresholder generates one or more thresholding photonic signals based on a first of the one or more photonic output signals. The second cascaded series of one or more photonic components generates one or more photonic output signals based at least in part on a second of the one or more intermediate photonic output signals and the one or more thresholding photonic signals.

Abstract: A photonic circuit with a semiconductor optical amplifier-based amplitude thresholder for correcting bit errors produced by a passive photonic logic. In addition to the amplitude thresholder, the photonic circuit further includes a plurality of photonic inputs receiving photonic input signals, a first cascaded series of photonic components coupled to the photonic inputs, and a second cascaded series of photonic components coupled to the amplitude thresholder. The first cascaded series of photonic components generates a plurality of intermediate photonic output signals based on the photonic input signals. The amplitude thresholder generates a saturated photonic signal based on a first of the plurality of intermediate photonic output signals when the amplitude thresholder operates in a single nonlinear region.

Abstract: An avalanche photodiode includes a silicon layer on a substrate; a germanium layer on the silicon layer; and a plurality of contacts including a cathode, an anode, and at least two separate gain tuning contacts configured to adjust an electric field to tune multiplication of carriers. The at least two separate gain tuning contacts are configured to control the electric field in the germanium layer and silicon layer. The at least two separate gain tuning contacts are configured to tailor the electric field such that the multiplication of carriers is greater in the silicon layer than the germanium layer. This added gain tuning control can be used to tailor the electric field profile such that multiplication happens mostly in silicon to achieve lower excess noise and little to no bandwidth variation.

Abstract: An avalanche photodiode includes a silicon layer on a substrate; a germanium layer on the silicon layer; a cathode and an anode on any of the silicon layer and the germanium layer; and a plurality of contacts on the germanium layer, in addition to the cathode and the anode. The silicon layer can include a highly doped region at each end, an intrinsic doped region in a middle, and an intermediately doped region between the highly doped region at each end and the intrinsic doped region, and the cathode and the anode are each at a respective a highly doped region at each end. The germanium layer can include a plurality of highly doped regions with each including one of the plurality of contacts.

Abstract: An avalanche photodiode includes a silicon layer on a substrate; a germanium layer on the silicon layer; a cathode and an anode on any of the silicon layer and the germanium layer; and a plurality of contacts on the germanium layer, in addition to the cathode and the anode. The silicon layer can include a highly doped region at each end, an intrinsic doped region in a middle, and an intermediately doped region between the highly doped region at each end and the intrinsic doped region, and the cathode and the anode are each at a respective a highly doped region at each end. The germanium layer can include a plurality of highly doped regions with each including one of the plurality of contacts.

Abstract: According to some implementations, an avalanche photodiode may include a photon absorbing layer to absorb photons of an optical beam and to provide a response. The avalanche photodiode may include a gain response layer to provide a gain to the response. The avalanche photodiode may include a bias control structure connected to the gain response layer to control an electric field in the photon absorbing layer and the gain response layer.

Abstract: According to some implementations, an avalanche photodiode may include a photon absorbing layer to absorb photons of an optical beam and to provide a response. The avalanche photodiode may include a gain response layer to provide a gain to the response. The avalanche photodiode may include a bias control structure connected to the gain response layer to control an electric field in the photon absorbing layer and the gain response layer.