Patents by Inventor Allan F. Pease

Allan F. Pease has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Prefetch/prestore mechanism for peripheral controllers with shared internal bus
    Patent number: 5557750
    Abstract: A single chip peripheral bus adapter circuit has a pair of input and output first in, first out (FIFO) buffers, a main buffer, and a pair of supporting registers. The registers increase the performance of the circuit by eliminating or reducing wait states.
    Type: Grant
    Filed: October 20, 1992
    Date of Patent: September 17, 1996
    Assignee: Future Domain Corporation
    Inventors: Richard S. Moore, Allan F. Pease
  • Interface and control circuit for regulating data flow in a SCSI initiator with multiple host bus interface selection
    Patent number: 5544326
    Abstract: A single chip SCSI controller circuit has a pair of input and output first in, first out (FIFO) buffers as well as a main buffer. The circuit supports synchronous and asynchronous data transfers which are fully compatible with the SCSI-II specification. A mode select pin may be selectively actuated by the user or by attached interface circuitry to configure the chip for either microchannel architecture (MCA) or industry standard architecture (ISA) compatibility.
    Type: Grant
    Filed: March 11, 1993
    Date of Patent: August 6, 1996
    Assignee: Future Domain Corporation, Incorporated
    Inventors: Allan F. Pease, Richard Moore