Abstract: A method and system for reducing the computation complexity and improving accuracy of delay and crosstalk calculation in transmission-lines with frequency-dependent losses. An analysis tool based on restricted coupled-line topologies, simple two-dimensional to three-dimensional RLC matrix conversion, and use of prestored synthesized circuits that accurately capture frequency-dependent loss effects. The CAD tool can handle frequency-dependent resistive and inductive effects for coupled-interconnections on large microprocessor chips with >10K of critical nets. This is done in an interactive manner during the design cycle and allows first path fast product design.

Abstract: A program method for noise calculation and modeling caculates crosstalk voltage for a planned chip design, by first running routing and crosstalk routines for creating crosstalk rules for the planned design of a chip and loading crosstalk rules after routing is completed, and calculating the noise voltage of the planned design based on the exact topologies/paths of the victim and perpetrator nets of the planned design by path tracing and outputing a program file which contains the calculated noise voltage and a complete tabulation of the key physical and electrical parameters of the victim and perpetrator nets of the planned design, and then modeling using a network analysis program to selected nets of the design which exceed allowed noise limitations and obtaining the planned design net's network topology as an output while using the program file containing noise voltage calculation results as an input to the net's topology circuit simulation modeling program and outputting a nodal voltages vs.