Abstract: A cleaner head including suction chamber having a suction opening; an agitator including a hollow body and supported the suction chamber by a support member, the support member having a first end that is fixed to a side wall of the suction chamber,and second end that free and over which the hollow body of the agitator can be slideably received; and a drive assembly forming part of the support member, and arranged to rotate the agitator about an axis. The fixed end of the support member is pivotal fixed to the side all of the suctionchamber such that the free end of the support member, together with the agitator supported thereon, can be pivoted to protrude out frome suction opening, to allow the agitator o be removed and replaced.

Abstract: A device or class of devices that provides a mechanism for controlling charge current flow in transistors that employs collective magnetic effects to overcome voltage limitations associated with single-particle thermionic emission as in conventional MOSFETs. Such a device may include two or more magnetic stacks with an easy-in-plane ferromagnetic film sandwiched between oppositely magnetically oriented perpendicular magnetization anisotropy (PMA) ferromagnets. Each stack includes two non-magnetic layers separating the easy-plane ferromagnetic film from the PMA layers. Charge current flow through one of these stacks controls the current-voltage negative differential resistance characteristics of the second stack through collective magnetic interactions. This can be exploited in a variety of digital logic gates consuming less energy than conventional CMOS integrated circuits.

Abstract: A device or class of devices that provides a mechanism for controlling charge current flow in transistors that employs collective magnetic effects to overcome voltage limitations associated with single-particle thermionic emission as in conventional MOSFETs. Such a device may include two or more magnetic stacks with an easy-in-plane ferromagnetic film sandwiched between oppositely magnetically oriented perpendicular magnetization anisotropy (PMA) ferromagnets. Each stack includes two non-magnetic layers separating the easy-plane ferromagnetic film from the PMA layers. Charge current flow through one of these stacks controls the current-voltage negative differential resistance characteristics of the second stack through collective magnetic interactions. This can be exploited in a variety of digital logic gates consuming less energy than conventional CMOS integrated circuits.

Abstract: An annular nozzle for a ceiling fan includes an inner wall defining a bore having a bore axis, an outer wall extending about the inner wall, an air inlet for receiving an air flow, and an air outlet section extending between the inner wall and the outer wall. The air outlet section defines an air outlet for emitting the air flow. An interior passage extends about the bore axis for conveying the air flow to the air outlet. The air outlet section is configured to emit the air flow away from the bore axis.

Abstract: A Topological INsulator-based field-effect transistor (TINFET) is disclosed. The TINFET includes a first and second gate dielectric layers separated by a topological insulator (TI) layer. A first gate contact is connected to the first gate dielectric layer on the surface that is opposite the TI layer. A second gate contact may be connected to the second gate dielectric layer on the surface that is opposite the TI layer. A first TI surface contact is connected to one surface of the TI layer, and a second TI surface contact is connected to the second surface of the TI layer.

Abstract: A Topological INsulator-based field-effect transistor (TINFET) is disclosed. The TINFET includes a first and second gate dielectric layers separated by a topological insulator (TI) layer. A first gate contact is connected to the first gate dielectric layer on the surface that is opposite the TI layer. A second gate contact may be connected to the second gate dielectric layer on the surface that is opposite the TI layer. A first TI surface contact is connected to one surface of the TI layer, and a second TI surface contact is connected to the second surface of the TI layer.

Abstract: A bi-layer pseudo-spin field-effect transistor (BiSFET) is disclosed. The BiSFET includes a first and second conduction layers separated by a tunnel dielectric. The BiSFET transistor also includes a first gate separated from the first conduction layer by an insulating dielectric layer, and a second gate separated from the second conduction layer by an insulating layer. These conduction layers may be composed of graphene. The voltages applied to the first and/or second gates can control the peak current and associated voltage value for current flow between top and bottom conduction channels, and interlayer current voltage characteristic exhibiting negative differential resistance. BiSFETs may be used to make a variety of logic gates. A clocked power supply scheme may be used to facilitate BiSFET-based logic.

Abstract: A bi-layer pseudo-spin field-effect transistor (BiSFET) is disclosed. The BiSFET includes a first and second conduction layers separated by a tunnel dielectric. The BiSFET transistor also includes a first gate separated from the first conduction layer by an insulating dielectric layer, and a second gate separated from the second conduction layer by an insulating layer. These conduction layers may be composed of graphene. The voltages applied to the first and/or second gates can control the peak current and associated voltage value for current flow between top and bottom conduction channels, and interlayer current voltage characteristic exhibiting negative differential resistance. BiSFETs may be used to make a variety of logic gates. A clocked power supply scheme may be used to facilitate BiSFET-based logic.

Abstract: An annular nozzle for a ceiling fan includes an inner wall defining a bore having a bore axis, an outer wall extending about the inner wall, an air inlet for receiving an air flow, and an air outlet section extending between the inner wall and the outer wall. The air outlet section defines an air outlet for emitting the air flow. An interior passage extends about the bore axis for conveying the air flow to the air outlet. The air outlet section is configured to emit the air flow away from the bore axis.

Abstract: A bi-layer pseudo-spin field-effect transistor (BiSFET) is disclosed. The BiSFET includes a first and second conduction layers separated by a tunnel dielectric. The BiSFET transistor also includes a first gate separated from the first conduction layer by an insulating dielectric layer, and a second gate separated from the second conduction layer by an insulating layer. These conduction layers may be composed of graphene. The voltages applied to the first and/or second gates can control the peak current and associated voltage value for current flow between top and bottom conduction channels, and interlayer current voltage characteristic exhibiting negative differential resistance. BiSFETs may be used to make a variety of logic gates. A clocked power supply scheme may be used to facilitate BiSFET-based logic.

Abstract: A bi-layer pseudo-spin field-effect transistor (BiSFET) is disclosed. The BiSFET includes a first and second conduction layers separated by a tunnel dielectric. The BiSFET transistor also includes a first gate separated from the first conduction layer by an insulating dielectric layer, and a second gate separated from the second conduction layer by an insulating layer. These conduction layers may be composed of graphene. The voltages applied to the first and/or second gates can control the peak current and associated voltage value for current flow between top and bottom conduction channels, and interlayer current voltage characteristic exhibiting negative differential resistance. BiSFETs may be used to make a variety of logic gates. A clocked power supply scheme may be used to facilitate BiSFET-based logic.

Abstract: The electronic parking meter includes a microcontroller, an input interface, an output interface, communications devices and a power supply. The microcontroller receives instructions through the input interface from a user wishing to purchase parking time, controls the output interface to provide parking related messages or indications, and controls the electronic parking meter's communications with other devices through the communications devices for transmitting and receiving information and data. The power supply, which converts a battery pack voltage up to the operating voltage, may include an isolation transformer and a flyback switcher. The parking meter is maintained in a sleep mode as a default state, is placed in a schedule wake-up mode at a predetermined frequency for a predetermined short period of time to carry-out maintenance functions, and is only placed in an event wake-up mode for the time required to process major events, such as coin chute, card reader or communications port interrupts.

Abstract: The electronic parking meter includes a microcontroller, an input interface, an output interface, communications devices and a power supply. The microcontroller receives instructions through the input interface from a user wishing to purchase parking time, controls the output interface to provide parking related messages or indications, and controls the electronic parking meter's communications with other devices through the communications devices for transmitting and receiving information and data. The power supply, which converts a battery pack voltage up to the operating voltage, may include an isolation transformer and a flyback switcher. The parking meter is maintained in a sleep mode as a default state, is placed in a schedule wake-up mode at a predetermined frequency for a predetermined short period of time to carry-out maintenance functions, and is only placed in an event wake-up mode for the time required to process major events, such as coin chute, card reader or communications port interrupts.