Abstract: The drive current of the switch in a switching power converter is adjusted dynamically according to line or load conditions within a switching cycle and/or over a plurality of switching cycles. The magnitude of the switch drive current can be dynamically adjusted within a switching cycle and/or over a plurality of switching cycles, in addition to the pulse widths or pulse frequencies of the switch drive current.

Abstract: A system for communicating with a host using control signals over a 1-wire interface is disclosed. The system includes a driver coupled to the host by the 1-wire interface. Control signals are transmitted from the host to the driver for decoding by the driver controller. The control signals are pulse width modulation format signals which are interpreted by the driver as binary encoded command mode signals or analog encoded command mode signals, depending upon when the signals are received in relation to a preamble pulse and a post-amble pulse.

Abstract: A switching power converter comprises a transformer (110), a switch (108) coupled to the transformer (110), and a switch controller (200) coupled to the switch (108) for generating a switch drive signal (207) to turn on or off the switch (108). The drive current of the switch drive signal (207) is adjusted dynamically according to line or load conditions within a switching cycle and/or over a plurality of switching cycles. The magnitude of the drive current can be dynamically adjusted within a switching cycle and/or over a plurality of switching cycles, in addition to the pulse widths or pulse frequencies of the drive current.

Abstract: The drive current of the switch in a switching power converter is adjusted dynamically according to line or load conditions within a switching cycle and/or over a plurality of switching cycles. The magnitude of the switch drive current can be dynamically adjusted within a switching cycle and/or over a plurality of switching cycles, in addition to the pulse widths or pulse frequencies of the switch drive current.

Abstract: A 1-wire communication protocol and interface circuitry for communication between a host controller and a LED driver is provided. The 1-wire communication protocol is configured such that both PWM signals and DC current setting commands for programming the LED driver may be transmitted from the host controller to the LED driver via the same 1-wire interface. The 1-wire communication protocol uses the length of the pulses (pulse width), rather than the number of pulses, to distinguish between different modes of communication (PWM signal transmission mode or command pulse transmission mode) and different commands of the same type (specific DC current programming commands, or specific average PWM drive current for the LED, within each transmission mode). Because the same 1-wire interface is used for transmitting both PWM signals and DC current commands, integrated circuits for the host controller and the LED driver do not require an additional wire or pin.

Abstract: A controller integrated circuit (IC) for controlling a power converter uses its input voltage pin with a plurality of functions, including receiving an input voltage to the power converter, charging an external startup capacitor through charging circuitry coupled internally to the input voltage pin, and also receiving a test signal for programming a programmable resistance in an input voltage scale down circuitry coupled to the input voltage pin. Use of the input voltage pin with a plurality of functions reduces the number of pins required in the controller IC, thereby reducing the cost of manufacturing the controller IC.

Abstract: A 1-wire communication protocol and interface circuitry for communication between a host controller and a LED driver is provided. The 1-wire communication protocol is configured such that both PWM signals and DC current setting commands for programming the LED driver may be transmitted from the host controller to the LED driver via the same 1-wire interface. The 1-wire communication protocol uses the length of the pulses (pulse width), rather than the number of pulses, to distinguish between different modes of communication (PWM signal transmission mode or command pulse transmission mode) and different commands of the same type (specific DC current programming commands, or specific average PWM drive current for the LED, within each transmission mode). Because the same 1-wire interface is used for transmitting both PWM signals and DC current commands, integrated circuits for the host controller and the LED driver do not require an additional wire or pin.

Abstract: A switching power converter comprises a transformer (110), a switch (108) coupled to the transformer (110), and a switch controller (200) coupled to the switch (108) for generating a switch drive signal (207) to turn on or off the switch (108). The drive current of the switch drive signal (207) is adjusted dynamically according to line or load conditions within a switching cycle and/or over a plurality of switching cycles. The magnitude of the drive current can be dynamically adjusted within a switching cycle and/or over a plurality of switching cycles, in addition to the pulse widths or pulse frequencies of the drive current.

Abstract: A power converter includes a switch controller having a dual output digital-to-analog converter for generating a variable reference voltage and a knee voltage offset from the reference voltage by a predetermined voltage. The variable reference voltage is generated based on a reconstructed representation of output voltage of the power converter in a previous switching cycle. Comparators compare the variable reference voltage and the variable knee voltage to a sensed output of the power converter in a first switching cycle. A digital logic of the switch controller receives signals from the comparators and determines a pulse signal for controlling an on-time and an off time of a switch in a second switching cycle.

Abstract: A bias controller includes a bias detector, a reference comparator, a memory component, and a reference voltage. The bias detector is operable to detect a bias current associated with a device controlled by the bias controller and produce a proportional sensed bias voltage. The reference comparator is operable to compare the bias voltage to a reference voltage and produce a first control signal operable to adjust a bias output of the bias controller. The memory component stores a plurality of reference voltage settings, one for each mode of operation of the device, the memory component including a mode setting input and a reference voltage output signal. The reference voltage adjustment circuit adjusts the reference voltage applied to the reference comparator in accordance with the mode of the device as controlled by the reference voltage output signal.

Abstract: A bias controller includes a bias detector, a reference comparator, a memory component, and a reference voltage. The bias detector is operable to detect a bias current associated with a device controlled by the bias controller and produce a proportional sensed bias voltage. The reference comparator is operable to compare the bias voltage to a reference voltage and produce a first control signal operable to adjust a bias output of the bias controller. The memory component stores a plurality of reference voltage settings, one for each mode of operation of the device, the memory component including a mode setting input and a reference voltage output signal. The reference voltage adjustment circuit adjusts the reference voltage applied to the reference comparator in accordance with the mode of the device as controlled by the reference voltage output signal.

Abstract: Disclosed are solid-state potentiometers having high resolution and high accuracy. An exemplary potentiometer comprises a first main terminal, a second main terminal, a wiper terminal, and a resistor stack comprising a plurality M of resistors coupled in series to one another at a plurality of M−1 internal nodes. Each of the resistors in the stack has substantially the same value of RS ohms. The potentiometer further comprises a first variable resistance network coupled between one end of the resistor stack and the potentiometer's first main terminal, and a second variable resistance network coupled between the other end of the resistor stack and the potentiometer's second main terminal. The first variable resistance network has a variable resistance value R1 which varies between zero ohms and RP ohms. The second variable resistance network has a variable resistance value R2 which is maintained substantially at value of (RP−R1).

Abstract: Disclosed are solid-state potentiometers having high resolution and high accuracy. An exemplary potentiometer comprises a first main terminal, a second main terminal, a wiper terminal, and a resistor stack comprising a plurality M of resistors coupled in series to one another at a plurality of M−1 internal nodes. Each of the resistors in the stack has substantially the same value of RS ohms. The potentiometer further comprises a first variable resistance network coupled between one end of the resistor stack and the potentiometer's first main terminal, and a second variable resistance network coupled between the other end of the resistor stack and the potentiometer's second main terminal. The first variable resistance network has a variable resistance value R1 which varies between zero ohms and RP ohms. The second variable resistance network has a variable resistance value R2 which is maintained substantially at value of (RP−R1).

Abstract: Disclosed are solid-state potentiometers having high resolution and high accuracy. An exemplary potentiometer has a first main terminal, a second main terminal, a wiper terminal, and a resistor stack having a plurality M of resistors coupled in series to one another at a plurality of M−1 internal nodes. Each of the resistors in the stack has substantially the same value of RS ohms. The potentiometer further has a first variable resistance network coupled between one end of the resistor stack and the potentiometer's first main terminal, and a second variable resistance network coupled between the other end of the resistor stack and the potentiometer's second main terminal. The first variable resistance network has a variable resistance value R1 which varies between zero ohms and RP ohms. The second variable resistance network has a variable resistance value R2 which is maintained substantially at value of (RP−R1).