Abstract: A code region of an application is instrumented by a multi-pass profiler with first annotations for generating profile data. The application is executed with the first annotations, wherein executing the application with the first annotations generates first profile data for the code region. The multi-pass profiler identifies, from the first profile data, the code region as a delinquent code region. The multi-pass profiler determines second annotations based, at least in part, on the first profile data and the at least one of the first annotations that defines the delinquent code region. The multi-pass profiler instruments, based on the first profile data, a code sub-region of the delinquent code region with the second annotations for generating profile data. The application is executed with second annotations, wherein executing the application with the second annotations generates second profile data for the code sub-region.

Abstract: A mechanism for minimizing effective memory latency without unnecessary cost through fine-grained software-directed data prefetching using integrated high-level and low-level code analysis and optimizations is provided. The mechanism identifies and classifies streams, identifies data that is most likely to incur a cache miss, exploits effective hardware prefetching to determine the proper number of streams to be prefetched, exploits effective data prefetching on different types of streams in order to eliminate redundant prefetching and avoid cache pollution, and uses high-level transformations with integrated lower level cost analysis in the instruction scheduler to schedule prefetch instructions effectively.

Abstract: A method includes configuring one or more processors to perform operations. The operations include instrumenting at least one code region of an application with at least one annotation for generating profile data when the at least one code region is executed. The operations include executing the application to generate profile data for the at least one code region. The operations also include identifying, from the profile data, a delinquent code region from the generated profile data. The operations include instrumenting the delinquent code region with annotations for generating profile data when the code regions are executed. The operations include executing the application to generate additional profile data for the at least one code region, including the delinquent code region.

Abstract: The invention pertains to an improved method for generating ALU instruction sequences for performing integer multiplication. The invention analytically helps to find an optimal sequence of shift, add and subtract instructions for performing integer multiplication by trying to add or subtract all powers of 2 less than the integer multiplier itself and then trying to factor evenly the resulting sum or difference by that power of 2 plus or minus one. If each such resulting factor value factors by a power of 2, the corresponding factor set is a favorable one for generating an optimal ALU instruction sequence.