Patents by Inventor Allan T. Hurst
Allan T. Hurst has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7821048Abstract: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated magnetic memory structures. In one aspect, the present teachings relate to magnetic memory structure fabrication techniques in a high density configuration that includes an efficient means for programming high density magnetic memory structures.Type: GrantFiled: November 25, 2008Date of Patent: October 26, 2010Assignee: Micron Technology, Inc.Inventors: Allan T. Hurst, Jeffrey Sather, Jason B. Gadbois
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Publication number: 20090073757Abstract: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated magnetic memory structures. In one aspect, the present teachings relate to magnetic memory structure fabrication techniques in a high density configuration that includes an efficient means for programming high density magnetic memory structures.Type: ApplicationFiled: November 25, 2008Publication date: March 19, 2009Applicant: Micron Technology, Inc.Inventors: Allan T. Hurst, Jeffrey Sather, Jason B. Gadbois
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Patent number: 7459739Abstract: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated magnetic memory structures. In one aspect, the present teachings relate to magnetic memory structure fabrication techniques in a high density configuration that includes an efficient means for programming high density magnetic memory structures.Type: GrantFiled: April 10, 2006Date of Patent: December 2, 2008Assignee: Micron Technology, Inc.Inventors: Allan T. Hurst, Jeffrey Sather, Jason B. Gadbois
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Patent number: 7029926Abstract: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated magnetic memory structures. In one aspect, the present teachings relate to magnetic memory structure fabrication techniques in a high density configuration that includes an efficient means for programming high density magnetic memory structures.Type: GrantFiled: November 18, 2004Date of Patent: April 18, 2006Assignee: Micron Technology, Inc.Inventors: Allan T. Hurst, Jeffrey Sather, Jason B. Gadbois
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Patent number: 7020004Abstract: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated magnetic memory structures. In one aspect, the present teachings relate to magnetic memory structure fabrication techniques in a high density configuration that includes an efficient means for programming high density magnetic memory structures.Type: GrantFiled: August 29, 2003Date of Patent: March 28, 2006Assignee: Micron Technology, Inc.Inventors: Allan T. Hurst, Jeffrey Sather, Jason B. Gadbois
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Patent number: 6593150Abstract: Methods and systems are provided for depositing a magnetic film using one or more long throw magnetrons, and in some embodiments, an ion assist source and/or ion beam source. The long throw magnetrons are used to deposit particles at low energy and low pressure, which can be useful when, for example, depositing interfacial layers or the like. An ion assist source can be added to increase the energy of the particles provided by the long throw magnetrons, and/or modify or clean the layers on the surface of the substrate. An ion beam source can also be added to deposit layers at a higher energies and lower pressures to, for example, provide layers with increased crystallinity. By using a long throw magnetron, an ion assist source and/or an ion beam source, magnetic films can be advantageously provided.Type: GrantFiled: September 30, 2002Date of Patent: July 15, 2003Assignee: Honeywell International Inc.Inventors: Randy J. Ramberg, Allan T. Hurst, Mark J. Jenson
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Publication number: 20030038023Abstract: Methods and systems are provided for depositing a magnetic film using one or more long throw magnetrons, and in some embodiments, an ion assist source and/or ion beam source. The long throw magnetrons are used to deposit particles at low energy and low pressure, which can be useful when, for example, depositing interfacial layers or the like. An ion assist source can be added to increase the energy of the particles provided by the long throw magnetrons, and/or modify or clean the layers on the surface of the substrate. An ion beam source can also be added to deposit layers at a higher energies and lower pressures to, for example, provide layers with increased crystallinity. By using a long throw magnetron, an ion assist source and/or an ion beam source, magnetic films can be advantageously provided.Type: ApplicationFiled: September 30, 2002Publication date: February 27, 2003Inventors: Randy J. Ramberg, Allan T. Hurst, Mark L. Jenson
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Patent number: 6269027Abstract: In one aspect of the present invention, a non-volatile latching element is provided that includes one or more magnetic elements therein. By programming the magnetic elements to appropriate resistance values, the latching element assumes a pre-programmed state upon power up. The magnetic elements are preferably programmed using either a one or two layer word line. In another aspect of the present invention, the magnetic elements are formed as pseudo-spin valve structures utilizing only CoFe as the active ferromagnetic layers, with one ferromagnetic layer thinner than the other. This simplifies the design while maintaining the high moment material to achieve large GMR ratios.Type: GrantFiled: April 14, 1998Date of Patent: July 31, 2001Assignee: Honeywell, Inc.Inventors: Allan T. Hurst, Jr., Jeff S. Sather, Jason B. Gadbois
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Patent number: 6147922Abstract: In one aspect of the present invention, a non-volatile latching element is provided that includes one or more magnetic elements therein. By programming the magnetic elements to appropriate resistance values, the latching element assumes a pre-programmed state upon power up. The magnetic elements are preferably programmed using either a one or two layer word line. In another aspect of the present invention, the magnetic elements are formed as pseudo-spin valve structures utilizing only CoFe as the active ferromagnetic layers, with one ferromagnetic layer thinner than the other. This simplifies the design while maintaining the high moment material to achieve large GMR ratios.Type: GrantFiled: September 14, 1999Date of Patent: November 14, 2000Assignee: Honeywell, Inc.Inventors: Allan T. Hurst, Jr., Jeff S. Sather, Jason B. Gadbois
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Patent number: 6048739Abstract: A high density magnetic memory device and method of manufacture therefor, wherein the magnetic bit region is provided after selected higher temperature processing steps are performed. Illustrative higher temperature processing steps include those that are performed above for example 400.degree. C., any may include contact and via plug processing. The present invention may allow, for example, contact and via plug processing to be used to form magnetic RAM devices. As indicated above, contact and/or via plug processing typically allows the size of the contacts and vias to be reduced, and the packing density of the resulting memory device to be increased.Type: GrantFiled: December 18, 1997Date of Patent: April 11, 2000Assignee: Honeywell Inc.Inventors: Allan T. Hurst, Jeffrey S. Sather, William F. Witcraft, Cheisan J. Yue
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Patent number: 6027948Abstract: A method for performing an elevated temperature process on an integrated device whereby a magnetic field is used to maintain the alignment of magnetic domains in magnetically sensitive materials.Type: GrantFiled: September 30, 1997Date of Patent: February 22, 2000Assignee: Honeywell International Inc.Inventors: Ronald J. Jensen, Richard K. Spielberger, Allan T. Hurst, Jeff Sather
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Patent number: 5982658Abstract: A magnetoresistive memory array which has a row of active sense lines with each sense line including magnetoresistive bits and word lines extending over the bits. Each active sense line ending in a termination bit having a configuration selected to cause an adjacent bit to experience a magnetic field similar to that experienced by the remaining bits in the sense line. An inactive sense line located at each end of the row of active sense lines.Type: GrantFiled: October 31, 1997Date of Patent: November 9, 1999Assignee: Honeywell Inc.Inventors: Lonny L. Berg, Paul W. Cravens, Allan T. Hurst, Tangshiun Yeh
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Patent number: 5956267Abstract: A word line structure, and method of manufacture therefor, for a monolithically formed magnetoresistive memory device having a magnetic field sensitive bit region. In a preferred embodiment, the word line structure includes a dielectric layer having an etched cavity formed therein, wherein the cavity has a bottom surface and two spaced side surfaces. A magnetic field keeper is provided adjacent to the back and/or side surfaces of the cavity. A conductive word line is also provided in the cavity and adjacent to the magnetic field keeper to at least substantially fill the cavity. A polishing step may be used to remove any portion of the magnetic field keeper and/or conductive word line that lie above the top surface of the dielectric layer to provide a planer top surface.Type: GrantFiled: December 18, 1997Date of Patent: September 21, 1999Assignee: Honeywell IncInventors: Allan T. Hurst, William Vavra
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Patent number: 5939772Abstract: A package for shielding a circuit containing magnetically sensitive materials from external magnetic fields. A shield attached to a base of the package is connected by vias to a first conductive plane. A shield attached to a lid of the package is connected by vias to a second conductive plane. The first shield and the second shield are electrically interconnected. Conductive leads extend from the package and are connected internally to the circuit.Type: GrantFiled: October 31, 1997Date of Patent: August 17, 1999Assignee: Honeywell Inc.Inventors: Allan T. Hurst, Richard K. Spielberger
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Patent number: 5756366Abstract: Magnetoresistive random access memory bit edges are magnetically hardened to prevent bit edge reversal.Type: GrantFiled: December 21, 1995Date of Patent: May 26, 1998Assignee: Honeywell Inc.Inventors: Lonny L. Berg, Allan T. Hurst, Jr., Tangshiun Yeh, Paul W. Cravens
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Patent number: 5569617Abstract: In a magnetoresistive random access memory device, a spacer material is deposited at the edges of a memory bit to maintain magnetization at the edges in a direction along the edges.Type: GrantFiled: December 21, 1995Date of Patent: October 29, 1996Assignee: Honeywell Inc.Inventors: Tangshiun Yeh, Allan T. Hurst, Huang-Joung Chen, Lonny L. Berg, William F. Witcraft
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Patent number: 5496759Abstract: A process for forming a magnetoresistive bit and an interconnection to an underlying component forms a pattern in an amorphous dielectric overlying the magnetic materials. Portions of the magnetic materials are removed to form a bit having a smooth bit edge profile by ion milling. The bit has a bit end located over the underlying component. A second amorphous dielectric layer is deposited and etched at the bit end to form a via at the underlying component. Conventional first metal is used to form the interconnection.Type: GrantFiled: December 29, 1994Date of Patent: March 5, 1996Assignee: Honeywell Inc.Inventors: Jerry Yue, Allan T. Hurst, Tangshiun Yeh, Huang-Joung Chen
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Patent number: 5060193Abstract: A method for storing selected magnetic states in magnetic bit structures so as to assure establishment of the desired state therein. A first word line current, used for storing a magnetic state, is followed by providing a second word line current. The second line current assures establishment of the desired state in the magnetic bit structure by overcoming any pinning of a magnetic wall.Type: GrantFiled: April 4, 1990Date of Patent: October 22, 1991Assignee: Honeywell Inc.Inventors: James M. Daughton, Allan T. Hurst, Jr., Arthur V. Pohm
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Patent number: 5012444Abstract: A method for sensing magnetic states of magnetic bit structures formed of separated double layer, magnetoresistive, ferromagnetic memory films through providing a word line current in a direction which results in a magnetic field due thereto, in the memory films of these bit structures, that is oriented in a direction opposite a common direction followed at least partially by orientations of edge magnetizations in these films that are parallel to the edges thereof, and sensing a change in electrical resistance of these bit structures as a result of that current.Type: GrantFiled: April 4, 1990Date of Patent: April 30, 1991Assignee: Honeywell Inc.Inventors: Allan T. Hurst, Jr., Arthur V. Pohm