Patents by Inventor Allan Ward

Allan Ward has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210280729
    Abstract: Photovoltaic devices, and methods of making the same, are described.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 9, 2021
    Applicant: First Solar, Inc.
    Inventors: James Armour, Edmund Elce, Albert Mui, Allan Ward
  • Patent number: 9515135
    Abstract: An edge termination structure for a silicon carbide semiconductor device includes a plurality of spaced apart concentric floating guard rings in a silicon carbide layer that at least partially surround a silicon carbide-based junction, an insulating layer on the floating guard rings, and a silicon carbide surface charge compensation region between the floating guard rings and adjacent the surface of the silicon carbide layer. A silicon nitride layer is on the silicon carbide layer, and an organic protective layer is on the silicon nitride layer. An oxide layer may be between the silicon nitride layer and the surface of the silicon carbide layer. Methods of forming edge termination structures are also disclosed.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: December 6, 2016
    Assignee: Cree, Inc.
    Inventors: Sei-Hyung Ryu, Anant K. Agarwal, Allan Ward
  • Patent number: 9024327
    Abstract: A semiconductor device structure is disclosed that includes a wide-bandgap semiconductor portion selected from the group consisting of silicon carbide and the Group III nitrides. An interconnect structure is made to the semiconductor portion, and the interconnect structure includes at least two diffusion barrier layers alternating with two respective high electrical conductivity layers. The diffusion barrier layers have a coefficient of thermal expansion different from and lower than the coefficient of thermal expansion of the high electrical conductivity layers. The difference in the respective coefficients of thermal expansions are large enough to constrain the expansion of the high conductivity layers but less than a difference that would create a strain between adjacent layers that would exceed the bond strength between the layers.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: May 5, 2015
    Assignee: Cree, Inc.
    Inventors: Allan Ward, Jason Henning
  • Publication number: 20130134433
    Abstract: A semiconductor device structure is disclosed that includes a wide-bandgap semiconductor portion selected from the group consisting of silicon carbide and the Group III nitrides. An interconnect structure is made to the semiconductor portion, and the interconnect structure includes at least two diffusion barrier layers alternating with two respective high electrical conductivity layers. The diffusion barrier layers have a coefficient of thermal expansion different from and lower than the coefficient of thermal expansion of the high electrical conductivity layers. The difference in the respective coefficients of thermal expansions are large enough to constrain the expansion of the high conductivity layers but less than a difference that would create a strain between adjacent layers that would exceed the bond strength between the layers.
    Type: Application
    Filed: December 14, 2007
    Publication date: May 30, 2013
    Inventors: Allan Ward, Jason Henning
  • Patent number: 8049272
    Abstract: A MESFET includes a silicon carbide layer, spaced apart source and drain regions in the silicon carbide layer, a channel region positioned within the silicon carbide layer between the source and drain regions and doped with implanted dopants, and a gate contact on the silicon carbide layer. Methods of forming a MESFET include providing a layer of silicon carbide, forming spaced apart source and drain regions in the silicon carbide layer, implanting impurity atoms to form a channel region between the source and drain regions, annealing the implanted impurity atoms, and forming a gate contact on the silicon carbide layer.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: November 1, 2011
    Assignee: Cree, Inc.
    Inventors: Jason P. Henning, Allan Ward, Alexander Suvorov
  • Patent number: 7915703
    Abstract: Fabrication of a Schottky diodes may include providing a Schottky contact layer containing a low barrier metal layer with spaced apart high barrier metal islands therein on a first surface of a substrate. A diode contact is formed on a second surface of the substrate that is opposite to the first surface. Formation of the Schottky contact layer may include providing a liquid mixture of a high barrier metal and a low barrier metal on the first surface of the substrate. Temperature and/or relative concentrations of the high and low barrier metals in the liquid mixture may be controlled to cause regions of the high barrier metal to solidify within the liquid mixture and agglomerate to form the spaced apart high barrier metal islands while inhibiting solidification of the low barrier metal. The temperature and relative concentrations may then be controlled to cause the low barrier metal to solidify and form the low barrier metal layer containing the high barrier metal islands.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: March 29, 2011
    Assignee: Cree, Inc.
    Inventors: Jason Patrick Henning, Allan Ward
  • Patent number: 7880172
    Abstract: A unit cell of a metal-semiconductor field-effect transistor (MESFET) includes a semi-insulating substrate having a surface, an implanted n-type channel region in the substrate, and implanted source and drain regions extending from the surface of the substrate into the implanted channel region. A gate contact is between the source and the drain regions, and an implanted p-type region is beneath the source region. The implanted p-type region has an end that extends towards the drain region, is spaced apart vertically from the implanted channel layer, and is electrically coupled to the source region. Methods of forming transistors including implanted channels and implanted p-type regions beneath the source region are also disclosed.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: February 1, 2011
    Assignee: Cree, Inc.
    Inventors: Jason P. Henning, Allan Ward, Alexander Suvorov
  • Publication number: 20100289109
    Abstract: Fabrication of a Schottky diodes may include providing a Schottky contact layer containing a low barrier metal layer with spaced apart high barrier metal islands therein on a first surface of a substrate. A diode contact is formed on a second surface of the substrate that is opposite to the first surface. Formation of the Schottky contact layer may include providing a liquid mixture of a high barrier metal and a low barrier metal on the first surface of the substrate. Temperature and/or relative concentrations of the high and low barrier metals in the liquid mixture may be controlled to cause regions of the high barrier metal to solidify within the liquid mixture and agglomerate to form the spaced apart high barrier metal islands while inhibiting solidification of the low barrier metal. The temperature and relative concentrations may then be controlled to cause the low barrier metal to solidify and form the low barrier metal layer containing the high barrier metal islands.
    Type: Application
    Filed: May 13, 2009
    Publication date: November 18, 2010
    Inventors: Jason Patrick Henning, Allan Ward
  • Publication number: 20080179637
    Abstract: A unit cell of a metal-semiconductor field-effect transistor (MESFET) includes a semi-insulating substrate having a surface, an implanted n-type channel region in the substrate, and implanted source and drain regions extending from the surface of the substrate into the implanted channel region. A gate contact is between the source and the drain regions, and an implanted p-type region is beneath the source region. The implanted p-type region has an end that extends towards the drain region, is spaced apart vertically from the implanted channel layer, and is electrically coupled to the source region. Methods of forming transistors including implanted channels and implanted p-type regions beneath the source region are also disclosed.
    Type: Application
    Filed: January 31, 2007
    Publication date: July 31, 2008
    Inventors: Jason P. Henning, Allan Ward, Alexander Suvorov
  • Publication number: 20080116464
    Abstract: A method of producing an ohmic contact and a resulting ohmic contact structure are disclosed. The method includes the steps of forming a deposited film of nickel and silicon on a silicon carbide surface at a temperature below which either element will react with silicon carbide and in respective proportions so that the atomic fraction of silicon in the deposited film is greater than the atomic fraction of nickel, and heating the deposited film of nickel and silicon to a temperature at which nickel-silicon compounds will form with an atomic fraction of silicon greater than the atomic fraction of nickel but below the temperature at which either element will react with silicon carbide. The method can further include the step of annealing the nickel-silicon compound to a temperature higher than the heating temperature for the deposited film, and within a region of the phase diagram at which free carbon does not exist.
    Type: Application
    Filed: January 28, 2008
    Publication date: May 22, 2008
    Applicant: CREE, INC.
    Inventors: ALLAN WARD, JASON HENNING, HELMUT HAGLEITNER, KEITH WIEBER
  • Publication number: 20070292999
    Abstract: A MESFET includes a silicon carbide layer, spaced apart source and drain regions in the silicon carbide layer, a channel region positioned within the silicon carbide layer between the source and drain regions and doped with implanted dopants, and a gate contact on the silicon carbide layer. Methods of forming a MESFET include providing a layer of silicon carbide, forming spaced apart source and drain regions in the silicon carbide layer, implanting impurity atoms to form a channel region between the source and drain regions, annealing the implanted impurity atoms, and forming a gate contact on the silicon carbide layer.
    Type: Application
    Filed: April 16, 2007
    Publication date: December 20, 2007
    Inventors: Jason Henning, Allan Ward, Alexander Suvorov
  • Publication number: 20070018272
    Abstract: A semiconductor device is disclosed that includes a contact and an adjacent film on the surface of an underlying doped semiconductor material. The film has sufficient fixed charge to create an inversion layer adjacent the surface of the doped semiconductor material that under depletion conditions at least balances the number of surface states at the doping concentration of the underlying semiconductor material.
    Type: Application
    Filed: August 2, 2006
    Publication date: January 25, 2007
    Inventors: Jason Henning, Allan Ward
  • Publication number: 20070001176
    Abstract: An improved termination structure for high field semiconductor devices in silicon carbide is disclosed. The termination structure includes a silicon carbide-based device for high-field operation, an active region in the device, an edge termination passivation for the active region, in which the edge termination passivation includes, an oxide layer on at least some of the silicon carbide portions of the device for satisfying surface states and lowering interface density, a non-stoichiometric layer of silicon nitride on the oxide layer for avoiding the incorporation of hydrogen and for reducing parasitic capacitance and minimizing trapping, and, a stoichiometric layer of silicon nitride on the nonstoichiometric layer for encapsulating the nonstoichiometric layer and the oxide layer.
    Type: Application
    Filed: January 10, 2006
    Publication date: January 4, 2007
    Inventors: Allan Ward, Jason Henning
  • Publication number: 20070001174
    Abstract: A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.
    Type: Application
    Filed: June 29, 2005
    Publication date: January 4, 2007
    Inventors: Zoltan Ring, Helmut Hagleitner, Jason Henning, Andrew Mackenzie, Scott Allen, Scott Sheppard, Richard Smith, Saptharishi Sriram, Allan Ward
  • Publication number: 20060118792
    Abstract: An edge termination structure for a silicon carbide semiconductor device includes a plurality of spaced apart concentric floating guard rings in a silicon carbide layer that at least partially surround a silicon carbide-based junction, an insulating layer on the floating guard rings, and a silicon carbide surface charge compensation region between the floating guard rings and adjacent the surface of the silicon carbide layer. A silicon nitride layer is on the silicon carbide layer, and an organic protective layer is on the silicon nitride layer. An oxide layer may be between the silicon nitride layer and the surface of the silicon carbide layer. Methods of forming edge termination structures are also disclosed.
    Type: Application
    Filed: January 12, 2006
    Publication date: June 8, 2006
    Inventors: Sei-Hyung Ryu, Anant Agarwal, Allan Ward
  • Publication number: 20060006393
    Abstract: A method of producing an ohmic contact and a resulting ohmic contact structure are disclosed. The method includes the steps of forming a deposited film of nickel and silicon on a silicon carbide surface at a temperature below which either element will react with silicon carbide and in respective proportions so that the atomic fraction of silicon in the deposited film is greater than the atomic fraction of nickel, and heating the deposited film of nickel and silicon to a temperature at which nickel-silicon compounds will form with an atomic fraction of silicon greater than the atomic fraction of nickel but below the temperature at which either element will react with silicon carbide. The method can further include the step of annealing the nickel-silicon compound to a temperature higher than the heating temperature for the deposited film, and within a region of the phase diagram at which free carbon does not exist.
    Type: Application
    Filed: July 6, 2004
    Publication date: January 12, 2006
    Inventors: Allan Ward, Jason Henning, Helmut Hagleitner, Keith Wieber
  • Patent number: 6476957
    Abstract: An image rejecting microwave photonic downconverter uses a microwave sub-carrier modulation technique without concern for image frequency interference in the shifted signal, thereby allowing telecommunications systems to downconvert densely multiplexed communications channels into a low frequency band where conventionqal electronics can perform signal-processing functions. The image rejecting microwave photonic downconveter incoming microwave signals can be processed without ambiguity in direction finding applications, allowing remotable, multioctave microwave signal processing for frequency and phase determination.
    Type: Grant
    Filed: July 17, 2000
    Date of Patent: November 5, 2002
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Allan Ward, Keith J. Williams, Paul D. Biernacki, Lee T. Nichols
  • Patent number: 5623861
    Abstract: A pneumatic cylinder, especially for a spot-welding machine, has a sleeve valve mounted on the piston rod. The sleeve valve provides a venting valve for dumping pressure from a return chamber at the end of the forward stroke, and a progressive restrictor to close off a forward chamber and provide cushioning at the end of the return stroke.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 29, 1997
    Assignee: Savair, Inc.
    Inventors: Allan Ward, David J. Trimmer
  • Patent number: 5177337
    Abstract: An apparatus for applying a force to a workpiece as required in welding or clamping. The apparatus applies a force to the workpiece through a direct clamping action or through link enhanced scissor type action that increases the mechanical force supplied by a fluid driven cylinder. The fluid driven cylinder has piston rods at both ends of an elongated external housing. The fluid driven cylinder is supported at one end by an attachment to the end of one piston rod and is supported at the other end by an attachment to the external housing. A plurality of pistons permit the piston rods to move relative to one another and also relative to the external housing. The entire fluid driven cylinder can rotate and translate.
    Type: Grant
    Filed: October 25, 1990
    Date of Patent: January 5, 1993
    Assignee: Savair Limited
    Inventor: Allan Ward
  • Patent number: 4995243
    Abstract: A refrigeration unit composed of a drop-in package to be accommodated within an aperture in the top of a cabinet, and comprising a plug insertable neatly into the aperture and mounting refrigeration components on top and an evaporator together with an air impeller in an underside compartment, abutment means on the plug to limit intrusion of the plug to a position substantially flush with the ceiling of the cabinet, and air ducts directing air flow from the air impeller in a path adjacent the ceiling due to a sweeping curvature of a wall of each air duct which influences the path of air flow in compliance with the "Coanda" effect.
    Type: Grant
    Filed: January 23, 1989
    Date of Patent: February 26, 1991
    Assignee: F Muller Pty. Limited
    Inventor: Allan Ward