Patents by Inventor Allen Baker

Allen Baker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10628543
    Abstract: Systems and methods are provided for calculating a power characteristic of an integrated circuit design. For each standard cell of a gate-level netlist, a path length and a set of attributes are computed. For each leaf-level instance of a register-transfer level (RTL) netlist, a path length and a set of attributes are computed. The standard cells are partitioned into first subsets, each of the first subsets containing standard cells with a same path length and a same set of attributes. For each first subset, a relative percentage for each type of standard cell included in the first subset is calculated. The leaf-level instances are partitioned into second subsets. For each pair of corresponding first and second subsets, standard cells are associated with the leaf-level instances of the second subset based on the relative percentages. A power characteristic of the RTL netlist is calculated based on the associated standard cells.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: April 21, 2020
    Assignee: Ansys, Inc.
    Inventors: Renuka Vanukuri, Ajay Singh Bisht, Allen Baker
  • Patent number: 10417365
    Abstract: An example circuit includes: a first clock gating circuit coupled between a first latch and a second latch and configured to provide a first gated clock signal based at least in part on an input clock signal. The first latch is configured to be activated in response to the first gated clock signal being at a first logic level to pass a data input. The second latch is configured to be activated in response to the input clock signal being at a second logic level to pass a first selection signal.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: September 17, 2019
    Assignee: Ansys, Inc.
    Inventors: Ajay Singh Bisht, Allen Baker
  • Patent number: 10133839
    Abstract: Systems and methods are provided for calculating a power characteristic of an integrated circuit design. For each standard cell of a gate-level netlist, a path length and a set of attributes are computed. For each leaf-level instance of a register-transfer level (RTL) netlist, a path length and a set of attributes are computed. The standard cells are partitioned into first subsets, each of the first subsets containing standard cells with a same path length and a same set of attributes. For each first subset, a relative percentage for each type of standard cell included in the first subset is calculated. The leaf-level instances are partitioned into second subsets. For each pair of corresponding first and second subsets, standard cells are associated with the leaf-level instances of the second subset based on the relative percentages. A power characteristic of the RTL netlist is calculated based on the associated standard cells.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: November 20, 2018
    Assignee: Ansys, Inc.
    Inventors: Renuka Vanukuri, Ajay Singh Bisht, Allen Baker
  • Patent number: 10083267
    Abstract: An example circuit includes: a first clock gating circuit coupled between a first latch and a second latch and configured to provide a first gated clock signal based at least in part on an input clock signal. The first latch is configured to be activated in response to the first gated clock signal being at a first logic level to pass a data input. The second latch is configured to be activated in response to the input clock signal being at a second logic level to pass a first selection signal.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: September 25, 2018
    Assignee: Ansys, Inc.
    Inventors: Ajay Singh Bisht, Allen Baker
  • Publication number: 20110063231
    Abstract: A method and system of inputting data, including language and other forms of communication, into an electronic device is disclosed. The method and system are directed to reducing the number of keystrokes that a disabled person would need to make to use a computer or alternative communication device. The method and system according to the invention utilizes a virtual keyboard upon which a user makes an input pattern or “gesture”. The gesture is then transformed into a ranked list of language unit prefixes. Word prediction analysis then analyzes the list of language unit prefixes and develops a list of potential word or phrases that the user may select from.
    Type: Application
    Filed: September 14, 2009
    Publication date: March 17, 2011
    Applicant: InvoTek, Inc.
    Inventors: Thomas Jakobs, Allen Baker
  • Publication number: 20070006508
    Abstract: A rifle including the firing mechanism of a revolver from which the revolver's original barrel and handgrips were removed. A replacement barrel, having a length greater than that of the original barrel, is affixed to the front of the firing mechanism as a substitute for the original barrel. A replacement stock for engaging a shoulder of a user is affixed to the rear of the firing mechanism as a substitute for the handgrips. A forearm is affixed to the bottom of the replacement barrel for steadying the rifle while aiming and firing. A method for converting the revolver into the rifle is also provided herein.
    Type: Application
    Filed: July 5, 2005
    Publication date: January 11, 2007
    Inventors: Allen Baker, George Robins
  • Patent number: D534985
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: January 9, 2007
    Inventors: Allen Baker, George Robins
  • Patent number: D805543
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: December 19, 2017
    Inventor: Allen Baker
  • Patent number: D835144
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: December 4, 2018
    Inventor: Allen Baker