Patents by Inventor Allen H. Simon
Allen H. Simon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7263231Abstract: In one embodiment, a method of performing video image decoding includes the following. A compressed video image is downsampled in the frequency domain. The downsampled video image is inverse transformed. Motion compensation for the downsampled image is performed in the spatial domain.Type: GrantFiled: March 3, 2003Date of Patent: August 28, 2007Assignee: Intel CorporationInventors: Hong H. Jiang, Allen H. Simon, Val G. Cook
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Publication number: 20030198392Abstract: In one embodiment, a method of performing video image decoding includes the following. A compressed video image is downsampled in the frequency domain. The downsampled video image is inverse transformed. Motion compensation for the downsampled image is performed in the spatial domain.Type: ApplicationFiled: March 3, 2003Publication date: October 23, 2003Inventors: Hong H. Jiang, Allen H. Simon, Val G. Cook
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Publication number: 20030043918Abstract: In one embodiment, a method of performing video image decoding includes the following. A compressed video image is downsampled in the frequency domain. The downsampled video image is inverse transformed. Motion compensation for the downsampled image is performed in the spatial domain.Type: ApplicationFiled: December 20, 1999Publication date: March 6, 2003Inventors: HONG H. JIANG, ALLEN H. SIMON, VAL G. COOK
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Patent number: 6459452Abstract: A system, method, and apparatus are disclosed that support decoding of motion-compensation-encoded digital video sequences while having reduced storage requirements.Type: GrantFiled: March 31, 2000Date of Patent: October 1, 2002Assignee: Intel CorporationInventor: Allen H. Simon
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Patent number: 5859663Abstract: A visual indicator is employed on screen at each station of a video teleconference to inform respective participants of their place in a talk request queue. The indicators are controlled automatically in accordance with designer-chosen conference parameters. Optional system failsafe mechanisms protect against system lock-up.Type: GrantFiled: July 29, 1997Date of Patent: January 12, 1999Assignee: Intel CorporationInventor: Allen H. Simon
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Patent number: 5548793Abstract: A system and method for arbitrating among memory requests. According to a preferred embodiment, the system comprises a global memory and a plurality of datapaths. Each datapath comprises a datapath processor for executing instructions of an instruction sequence and for providing a plurality of memory request signal types in accordance with the instructions, wherein the plurality of memory request signal types comprises instruction memory request signals, scalar memory request signals, first-in and first-out memory request signals, statistical decoder memory request signals, and block transfer memory request signals. Each datapath also comprises local memory, a global port for transferring data between the local memory and the global memory, and a dual port comprising first and second local ports for transferring data between the local memory and the datapath processor, wherein the first and second local ports permit simultaneous transfer of data between the local memory and the datapath processor.Type: GrantFiled: April 21, 1994Date of Patent: August 20, 1996Assignee: Intel CorporationInventors: David L. Sprague, Kevin Harney, Eiichi Kowashi, Michael Keith, Allen H. Simon, Gregory M. Papadopoulos, Walter P. Hays, George F. Salem, Shih-Wei Shiue, Anthony P. Bertapelli, Vitaly H. Shilman
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Patent number: 5530884Abstract: A method and apparatus for processing data. According to a preferred embodiment, the apparatus comprises a plurality of datapaths, each datapath comprising datapath processor, and a statistical decoder input channel device. The statistical decoder input channel device prefetches variable length encoded data from a variable length encoded data source in response to a request by a program running on a datapath processor of a datapath of the plurality of datapaths. The statistical decoder input channel device comprises a statistical decoder processor and memory for decoding the variable length encoded data to provide fixed length decoded data, and a transmission output channel for transmitting the fixed length decoded data to the datapath.Type: GrantFiled: April 21, 1994Date of Patent: June 25, 1996Assignee: Intel CorporationInventors: David L. Sprague, Kevin Harney, Eiichi Kowashi, Michael Keith, Allen H. Simon, Gregory M. Papadopoulos, Walter P. Hays, George F. Salem, Shih-Wei Shiue, Anthony P. Bertapelli, Vitaly H. Shilman
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Patent number: 5517665Abstract: A system and method for processing data. According to a preferred embodiment, the system comprises a global memory and a plurality of datapaths. Each datapath comprises a datapath processor for executing instructions of an instruction sequence and for providing a plurality of memory request signal types in accordance with the instructions, local memory, a global port for transferring data between the local memory and the global memory, and a dual port comprising first and second local ports for transferring data between the local memory and the datapath processor, wherein the first and second local ports permit simultaneous transfer of data between the local memory and the datapath processor.Type: GrantFiled: April 21, 1994Date of Patent: May 14, 1996Assignee: Intel CorporationInventors: David L. Sprague, Kevin Harney, Eiichi Kowashi, Michael Keith, Allen H. Simon, Gregory M. Papadopoulos, Walter P. Hays, George F. Salem, Shih-Wei Shiue, Anthony P. Bertapelli, Vitaly H. Shilman
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Patent number: 5430854Abstract: A data processing system having execution units for executing instruction sequences determines at least two conditionals in accordance with the instructions and sets respective flags according to the determined conditionals. These flags are stored and later retrieved sequentially and the execution unit executes selected instructions of the instruction sequence according to the sequentially retrieved mask flags. These masked flags may be stored sequentially in a stack for sequential retrieval at a later time.Type: GrantFiled: October 27, 1993Date of Patent: July 4, 1995Inventors: David L. Sprague, Kevin Harney, Eiichi Kowashi, Michael Keith, Allen H. Simon, Michael Papadopoulos, Walter P. Hays, George F. Salem, Shih-Wei Shiue, Anthony P. Bertapelli, Vitaly H. Shilman
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Patent number: 5361370Abstract: A single-instruction multiple-data video signal processor employs a dual-ported local memory architecture in each local memory including a dedicated port for transfers between the local memory and a global memory. A block transfer controller, in combination with the dedicated port, permit each access to the global memory by a datapath processor to be overlapped with its instruction processing, thus usually avoiding stalling of the video signal processor.Type: GrantFiled: October 24, 1991Date of Patent: November 1, 1994Assignee: Intel CorporationInventors: David L. Sprague, Kevin Harney, Eiichi Kowashi, Michael Keith, Allen H. Simon, Michael Papadopoulos, Walter P. Hays, George F. Salem, Shih-Wei Shiue, Anthony P. Bertapellil, Vitaly H. Shilman
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Patent number: 5225904Abstract: A full motion color digital video signal is compressed, formatted for transmission, recorded on compact disc media and decoded at conventional video frame rates. During compression, regions of a frame are individually analyzed to select optimum fill coding methods specific to each region. Region decoding time estimates are made to optimize compression thresholds. Region descriptive codes conveying the size and locations of the regions are grouped together in a first segment of a data stream. Region fill codes conveying pixel amplitude indications for the regions are grouped together according to fill code type and placed in other segments of the data stream. The data stream segments are individually variable length coded according to their respective statistical distributions and formatted to form data frames.Type: GrantFiled: December 4, 1991Date of Patent: July 6, 1993Assignee: Intel CorporationInventors: Stuart J. Golin, Allen H. Simon, Brian Astle, John M. Keith
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Patent number: 5189636Abstract: A video signal processor includes cicuitry which may be conditioned by a mode control signal to operate as a single 16-bit adder or as two eight-bit adders. The circuitry includes two eight-bit adders, each of which has a carry-in input terminal and a carry-out output terminal. The carry-out output terminal of one of the adders is selectively coupled, via an AND gate, to the carry-in input terminal of the other adder. The AND gate is controlled by the mode control signal. In the mode where the circuitry operates as two eight-bit adders, additional circuiry is included to detect output values which may exceed the zero to 255 range of valid values and to saturate these invalid values either at zero or 255.Type: GrantFiled: December 10, 1990Date of Patent: February 23, 1993Assignee: Intel CorporationInventors: Michael F. Patti, Nicola J. Fedele, Kevin Harney, Allen H. Simon
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Patent number: 5187793Abstract: An instruction caching system comprises meta-instructions which are contained within the program being executed. A meta-machine, which is a small segment of software, executes the meta-instructions and passes control to the processor itself at appropriate times to execute blocks of instructions from the instruction cache.Type: GrantFiled: January 9, 1989Date of Patent: February 16, 1993Assignee: Intel CorporationInventors: John M. Keith, Allen H. Simon, David L. Sprague, Douglas F. Dixon, Judith A. Goldstein
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Patent number: 5088053Abstract: A video signal processing system includes a memory for holding digital data, input and output channel circuitry for reading data from and writing data to the memory and processing circuits for processing data read from the memory to produce data to be written to the memory. Each of the input and output channels produces two types of memory request signals, a normal request signal and an urgent request signal. The normal request signal is produced to gain access to the data in the memory for normal read and wire operations. The urgent request signal is produced to access the memory when the processing circuitry is in a paused state waiting either to obtain data from the input channel or to provide data to the output channel. The normal read and write request signals are handled with substantially equal priority by first scheduling circuitry. The urgent request signals are handled by second scheduling circuits according to a fixed priority scheme.Type: GrantFiled: November 16, 1987Date of Patent: February 11, 1992Assignee: Intel CorporationInventors: David L. Sprague, Allen H. Simon, Alfred Kwan
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Patent number: 5079630Abstract: A full motion color digital video signal is compressed, formatted for transmission, recorded on compact disc media and decoded at conventional video frame rates. During compression, regions of a frame are individually analyzed to select optimum fill coding methods specific to each region. Region decoding time estimates are made to optimize compression thresholds. Region descriptive codes conveying the size and locations of the regions are grouped together in a first segment of a data stream. Region fill codes conveying pixel amplitude indications for the regions are grouped together according to fill code type and placed in other segments of the data stream. The data stream segments are individually variable length coded according to their respective statistical distributions and formatted to form data frames.Type: GrantFiled: September 15, 1989Date of Patent: January 7, 1992Assignee: Intel CorporationInventors: Stuart J. Golin, Allen H. Simon, Brian Astle, John M. Keith
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Patent number: 5047975Abstract: A video signal processor includes circuitry which may be conditioned by a mode control signal to operate as a single 16-bit adder or as two eight-bit adders. The circuitry includes two eight-bit adders, each of which has a carry-in input terminal and a carry-out output terminal. The carry-out output terminal of one of the adders is selectively coupled, via an AND gate, to the carry-in input terminal of the other adder. The AND gate is controlled by the mode control signal. In the mode where the circuitry operates as two eight-bit adders, additional circuitry is included to detect output values which may exceed the zero to 255 range of valid values and to saturate these invalid values either at zero or 255.Type: GrantFiled: November 16, 1987Date of Patent: September 10, 1991Assignee: Intel CorporationInventors: Michael F. Patti, Nicola J. Fedele, Kevin Harney, Allen H. Simon
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Patent number: 4967196Abstract: Digital image data is encoded using a variable-length code which is described by a group of parameter values. Each parameter value describes a set of code values; each code value corresponds to a possible value of the data which is to be encoded. When the data is encoded, the parameter values are appended to the encoded data. A decoder stores the parameter values into a memory and then combines data values derived from the encoded data with parameter values from the memory to generate decoded data values. Each code word includes a prefix which indicates a number of successive parameter values which are to be summed, and a population index which is to be added to the summed parameter values to produce a decoded data value.Type: GrantFiled: March 31, 1988Date of Patent: October 30, 1990Assignee: Intel CorporationInventors: David L. Sprague, Allen H. Simon
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Patent number: 4918523Abstract: A full motion color digital video signal is compressed, formatted for transmission, recorded on compact disc media and decoded at conventional video frame rates. During compression, regions of a frame are individually analyzed to select optimum fill coding methods specific to each region. Region decoding time estimates are made to optimize compression thresholds. Region descriptive codes conveying the size and locations of the regions are grouped together in a first segment of a data stream. Region fill codes conveying pixel amplitude indications for the regions are grouped together according to fill code type and placed in other segments of the data stream. The data stream segments are individually variable length coded according to their respective statistical distributions and formatted to form data frames.Type: GrantFiled: October 5, 1987Date of Patent: April 17, 1990Assignee: Intel CorporationInventors: Allen H. Simon, Stuart J. Golin, Brian Astle, John M. Keith, Suz H. Wan
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Patent number: 4881194Abstract: A video signal processor includes a stored-program controller which concurrently reads two instruction values from a program memory during each instruction cycle. The next instruction used by the video signal processor is selected from between these two values. If the current instruction indicates a conditional branch operation, the value of one of a plurality of conditions internal to the video signal processor determines which of these two instructions is selected. Otherwise, a value provided by the current instruction itself determines which of the two instructions is selected. This configuration of the stored program controller implements a conditional branch facility in which there is no delay in fetching an instruction for either value of the selected condition.Type: GrantFiled: November 16, 1987Date of Patent: November 14, 1989Assignee: Intel CorporationInventors: David L. Sprague, Kevin Harney, Allen H. Simon, Herbert H. Taylor, Jr.
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Patent number: 4868653Abstract: A full motion color digital video signal is compressed, formatted for transmission, recorded on compact disc media and decoded at conventional video frame rates. During compression, regions of a frame are individually analyzed to select optimum fill coding methods specific to each region. Region decoding time estimates are made to optimize compression thresholds. Region descriptive codes conveying the size and locations of the regions are grouped together in a first segment of a data stream. Region fill codes conveying pixel amplitude indications for the regions are grouped together according to fill code type and placed in other segments of the data stream. The data stream segments are individually variable length coded according to their respective statistical distributions and formatted to form data frames.Type: GrantFiled: October 5, 1987Date of Patent: September 19, 1989Assignee: Intel CorporationInventors: Stuart J. Golin, Allen H. Simon, Brian Astle, John M. Keith