Abstract: The present invention provides a solution to the needs described above through a method and apparatus for a wireless network. The network includes a first wireless device and a second wireless device. The first wireless device comprises a transceiver for receiving and transmitting signals utilizing a wireless air interface and communication protocol. The second wireless device is capable of communicating with the first wireless device using the wireless air interface and communication protocol. The second wireless device is further capable of receiving and transmitting signals utilizing an IEEE 802.11 wireless protocol. The network further includes a wired device for communicating with the second wireless device utilizing the IEEE 802.11 wireless protocol.

Abstract: A level detecting waveform digitizer for repetitively sampling an analog waveform and converting analog samples into representative digital data is provided with a predictive time base circuit for accurately controlling sample timing with respect to a triggering event in the input waveform and a comparator for indicating when the magnitude of the waveform as indicated by the digital data exceeds a predetermined level. The digitizer also includes a counter for counting samples taken and a second comparator for indicating when the sample count reaches a predetermined limit.

Abstract: A predictive time base control circuit for a waveform sampling system of the type which converts a sequence of analog waveform samples into a sequence of digital quantities for storage in an addressable acquisition memory. The time base circuit generates a sampling control signal which initiates sampling at the end of a time interval of programmable duration following detection of a triggering event in the waveform, and which maintains sampling thereafter at regular intervals. The time base circuit permits the sampling system to operate in an equivalent time mode in which repetitive waveform sections are sampled at progressively skewed sampling intervals with respect to a repetitive triggering event. The sampling control signal is also frequency divided, delayed, and then applied as a write control signal to the sampling system acquisition memory.

Abstract: A waveform digitizer includes a sampling bridge for producing a sequence of analog samples of an input waveform, the samples being calibrated by an amplifier having adjustable offset and gain and then converted to digital quantities for storage in an addressable memory. The digitizer also includes memory and time base control circuits permitting real and equivalent time sampling of repetitive waveforms and logic circuits providing hardware averaging of multiple data samples.

Abstract: A signal generator for producing a triggered output signal of digitally controlled phase and frequency includes a skewing circuit for producing an output clock signal of the same period, T, as an input, triggered reference clock signal but which is phase skewed from the reference clock signal by a phase angle, P, of 0 to 360 degrees as determined by input digital data. The skewed clock signal is frequency divided by an integer factor N, and a timing circuit counts reference clock periods to initiate frequency division a programmable delay time (J.times.T seconds) following triggering of the reference clock signal, where J and N are integers also determined by input digital data. An AND gate qualifies the frequency divided skewed clock signal with the skewed clock signal itself to produce a periodic output signal of digitally controlled frequency N/T, the first pulse of which is delayed following triggering of the reference signal by a digitally controlled interval of (T.times.J)+(P.times.T/360) seconds.

Abstract: A computer-based instrument system is provided for progammably configuring a variety of computer-based test instruments for performing a variety of tests and permitting high speed execution of tests through concurrent operation of individual test instruments. The instruments are implemented on circuit boards and mounted in a chassis including permanent backplane wiring interconnecting the instruments and a timing and triggering control unit. The backplane wiring includes a conventional computer bus for carrying instructions from a master controller to each instrument and lines for a common system clock signal, protocol signals, and trigger signals between selected instruments and the timing and triggering control unit for synchronizing the operation of the instruments when performing a test. The timing and triggering control unit is adapted to programmably control instrument triggering according to individual test requirements without modification of backplane wiring.

Abstract: An oscillator produces an output signal which is frequency locked to a reference signal but phased locked to a triggering signal. The oscillator includes a NOR gate having its output fed back to one of its inputs through a programmable delay circuit while the triggering signal is applied to another of its inputs. When enabled by the triggering signal, the output signal of the NOR gate oscillates at a frequency inversely proportional to the delay time of the delay circuit. The delay time is controlled by a control circuit which counts NOR gate output signal cycles occurring during a predetermined number of reference signal cycles and increments the delay time when the count is higher than expected for an oscillator output signal of a desired frequency and decrements the delay time when the count is lower than expected.

Abstract: A digital acquisition system includes a high-speed sampling gate with analog memory for sampling input signals. The samples are converted to digital representations and stored in a digital memory. The digital representations are selectively recalled from the digital memory and fed back as estimators to the sampling gate's analog memory. Since the estimators are essentially the previous samples for each point of a given waveform, the stored waveform converges to the input waveform very quickly, facilitating accurate waveform replication. Embodiments for both sequential sampling and pseudo-random sampling are provided. Operational techniques of the digital acquisition system include noise reduction, loop gain determination, adaptive filtering and signal averaging.