Patents by Inventor Allen Lim

Allen Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240150593
    Abstract: Disclosed is a sealing composition for treating a metal substrate comprising: a polyolefin component; and a colloidal layered silicate. Also disclosed is a system for treating a metal substrate comprising: a cleaner composition; and/or a pretreatment composition for treating at least a portion of the substrate, the pretreatment composition comprising a Group IVB metal; and a sealing composition for treating at least a portion of the substrate treated with the cleaner composition and/or the pretreated composition, the sealing composition comprising a polyolefin component. Also disclosed is a method of treating a substrate comprising contacting at least a portion of a surface of the substrate with any of the compositions disclosed herein or any of the systems disclosed herein.
    Type: Application
    Filed: March 4, 2022
    Publication date: May 9, 2024
    Applicant: PPG Industries Ohio, Inc.
    Inventors: Corey James DeDomenic, Kristi Maree Allen, Elizabeth Stephenie Brown-Tseng, Peter Lawrence Votruba-Drzal, Silvia Bezer, Michael Gerard Olah, Steven Edward Bowles, Mary Lyn Chong Lim, Mark William McMillen
  • Publication number: 20150280365
    Abstract: An electrical plug having an extraction component that may be collapsed to decrease the profile of the plug and may be retracted to increase the profile of the plug. Increasing the profile of the plug increases the graspable area of the plug, making it easier to extract the plug from an outlet socket. The extraction component may be a slidable cover substantially surrounding a housing holding the pins and wiring of the plug within an overmold. The extraction component may also be a slidable cap connected to a pin bridge surrounded by an overmold. Openings formed within the pin bridge include a stopper that limits the retraction of the extraction component. The extraction components include a number of snap-fit pins that are each inserted into the openings beyond the stoppers, at which point the snap-fit ends of the pins expand and hold pins within the openings.
    Type: Application
    Filed: March 26, 2015
    Publication date: October 1, 2015
    Inventors: Boon Leng Allen Lim, Mui Lian Jessica Toh
  • Patent number: 7888610
    Abstract: Embodiments of the invention are related to a keypad and an electronic device having a keypad. In one embodiment a keypad comprises a plurality of keys. Each of the plurality of keys comprises one main electrode and at least one signal electrode is being adapted to connect electrically the main electrode and the at least one signal electrode when said key is pressed. The main electrode is connected to a reference potential connection of the keypad and surrounds the at least one signal electrode of said key.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: February 15, 2011
    Assignee: Infineon Technologies AG
    Inventor: Teck Chye Allen Lim
  • Publication number: 20100066571
    Abstract: Embodiments of the invention are related to a keypad and an electronic device having a keypad. In one embodiment a keypad comprises a plurality of keys. Each of the plurality of keys comprises one main electrode and at least one signal electrode is being adapted to connect electrically the main electrode and the at least one signal electrode when said key is pressed. The main electrode is connected to a reference potential connection of the keypad and surrounds the at least one signal electrode of said key.
    Type: Application
    Filed: September 18, 2008
    Publication date: March 18, 2010
    Inventor: Teck Chye Allen LIM
  • Publication number: 20070040284
    Abstract: A routing pattern for high speed signals for a package substrate. Electrically conductive bond fingers are disposed on a first surface of the package substrate. The first surface is adapted to receive an integrated circuit in an attachment zone, and the bond fingers are disposed in at least two substantially concentric rings around the attachment zone. The bond fingers of the innermost ring of bond fingers are all routed to electrically conductive first traces disposed on a first layer of the package substrate. The bond fingers other that those on the innermost ring of bond fingers are all routed to electrically conductive second traces disposed on a separate second layer of the package substrate. The package substrate has electrically conductive traces on only the first layer and the second layer. Electrically conductive contacts are disposed on a substantially opposing second surface.
    Type: Application
    Filed: August 17, 2005
    Publication date: February 22, 2007
    Inventors: Chok Chia, Allen Lim, Maurice Othieno
  • Patent number: 6970752
    Abstract: An apparatus and method for detecting the closure of one of several switches using a single input line of a detector is disclosed. The input line is also used to carry an audio-frequency signal when a recording switch is closed. The switches are connected to a network of resistors that cooperate with a pull-up resistor to form a voltage divider. The pull-up resistor is connected to the input line. The switches are closed to selectively switch resistors in the network out of the voltage divider to change the voltage on the input line. A detector reads the voltage on the input line and compares it with a set of predetermined values to determine which switch is closed. If a recording switch is closed, a microphone connected to the network of resistors converts sound to an audio-frequency signal onto the input line.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: November 29, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Teck Chye Allen Lim, Khiam Yong Tan
  • Patent number: 6831490
    Abstract: A clock synchronization circuit for generating an output clock signal that is in synchronization with a reference clock signal and a method embodying the principle of operation of the circuit are disclosed. The circuit has a programmable delay element and a phase detector. Synchronization is reached when the phase difference between the two clock signals is less than a predetermined value. The programmable delay element is coupled to the reference clock signal for introducing an adjustable delay in the reference clock signal to produce the output clock signal. By increasing the adjustable delay, the output clock signal becomes increasingly closer to being in synchronization with the reference clock signal. The phase detector is coupled to the reference clock signal and the output clock signal for detecting the phase difference between the two clock signals. The adjustable delay is increased until synchronization is obtained.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: December 14, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Khaim Yong Tan, Thiam Wah Loh, Teck Chye Allen Lim
  • Patent number: 6603200
    Abstract: An integrated circuit package includes a connector board and plural levels of individual conductors and conductive vias disposed through the connector board to form electrical connections between external connection pads on an undersurface of the connector board and finger connections on the upper surface of the connector board. An integrated circuit die is mounted in a central region of the connector board within confines of the individual conductors that are arranged about the die, and wire bond connections are formed between selected ones of the finger connections, the individual conductors, and the connection pads on the integrated circuit die to provide distributed connections for ground and power at one or more operating voltage levels on the individual conductors.
    Type: Grant
    Filed: September 12, 1997
    Date of Patent: August 5, 2003
    Assignee: LSI Logic Corporation
    Inventors: Qwai H. Low, Chok J. Chia, Seng-Sooi (Allen) Lim
  • Patent number: 6285077
    Abstract: A package for an integrated circuit is disclosed. The package comprises two layers (a top layer and a bottom layer) of flexible tape, each of which has a top surface and a bottom surface, with metal traces on the top surface. A die is mounted on top of the two layers and wire bonds connect bond pads on the die to metal traces on each of the two flexible tapes. The metal traces are routed along the top surfaces of the flexible tapes and are coupled to solder balls through holes in the tapes. These solder balls are mounted along the bottom of the package and serve as the electrical interface to a printed circuit board. Additional holes in the bottom layer tape allow solder balls to extend through the bottom layer tape so that they may be electrically coupled to traces on the top layer tape.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: September 4, 2001
    Assignee: LSI Logic Corporation
    Inventors: Chok J. Chia, Seng-Sooi Allen Lim, Qwai Hoong Low