Patents by Inventor Allen Parker
Allen Parker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240069736Abstract: Various embodiments include techniques for performing self-synchronizing remote memory operations in a multiprocessor computing system. During a remote memory operation in the multiprocessor computing system, a source processing unit transmits multiple segments of data to a destination processing. For each segment of data, the source processing unit transmits a remote memory operation to the destination processing unit that includes associated metadata that identifies the memory location of a corresponding synchronization object. The remote memory operation along with the metadata is transmitted as a single unit to the destination processing unit. The destination processing unit splits the operation into the remote memory operation and the memory synchronization operation. As a result, the source processing unit avoids the need to perform a separate memory synchronization operation, thereby reducing inter-processor communications and increasing performance of remote memory operations.Type: ApplicationFiled: August 31, 2022Publication date: February 29, 2024Inventors: Srinivas Santosh Kumar MADUGULA, Olivier GIROUX, Wishwesh Anil GANDHI, Michael Allen PARKER, Raghuram L, Ivan TANASIC, Manan PATEL, Mark HUMMEL, Alexander L. MINKIN
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Publication number: 20240028400Abstract: In various examples, a transaction type of a transaction from a processing resource of a plurality of processing resources sharing a bus may be determined and used to track bandwidth usage for the processing resource with respect to a time slot. Transactions that indicate usage of downstream bandwidth may be distinguished from transactions that do not indicate usage of downstream bandwidth. Bandwidth usage for a time slot may be tracked using one or more counters. The system may block or permit transactions from reaching the bus based at least on the counter exceeding a threshold value. The total allocation of bandwidth to the processing resources sharing a bus may be limited to a value that is less than a maximum capability of the bus to allow for headroom. Bandwidth coming from different lines and/or lanes and belonging to the same processing resource may be shared.Type: ApplicationFiled: July 25, 2022Publication date: January 25, 2024Inventors: Gaspar Mora Porta, Blaise Fanning, Michael Allen Parker, Manikandan Chandrasekaran, Adarsha Rao S J, Raghuram L
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Publication number: 20230333746Abstract: Various embodiments include techniques for performing speculative remote memory operation tracking in a multiprocessor computing system. Conventionally, transfers of data between processors and other components of a computing system require memory synchronization operations to determine that the data is valid and coherent before the data is transferred from a destination to a requesting source. Existing techniques for performing these memory synchronization operations are increasingly inefficient as the number of components in a computing system increases, particularly for remote memory operations. The disclosed techniques track remote memory operations and speculatively perform these memory synchronization operations. As a result, a given memory synchronization operation is often complete prior to the corresponding remote memory operation arrives at the destination, leading to improved efficiency and performance of remote memory operations in complex computing systems.Type: ApplicationFiled: November 17, 2022Publication date: October 19, 2023Inventors: Raymond Hoi Man WONG, Debajit BHATTACHARYA, Michael Allen PARKER, Wishwesh Anil GANDHI
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Publication number: 20230021678Abstract: Various embodiments include a parallel processing computer system that provides multiple memory synchronization domains in a single parallel processor to reduce unneeded synchronization operations. During execution, one execution kernel may synchronize with one or more other execution kernels by processing outstanding memory references. The parallel processor tracks memory references for each domain to each portion of local and remote memory. During synchronization, the processor synchronizes the memory references for a specific domain while refraining from synchronizing memory references for other domains. As a result, synchronization operations between kernels complete in a reduced amount of time relative to prior approaches.Type: ApplicationFiled: July 20, 2021Publication date: January 26, 2023Inventors: Michael Allen PARKER, Debajit BHATTACHARYA, David FONTAINE, Shirish GADRE, Wishwesh Anil GANDHI, Olivier GIROUX, Hemayet HOSSAIN, Ronny M. KRASHINSKY, Ze LONG, Raymond Hoi Man WONG
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Publication number: 20210076640Abstract: A transportable livestock training apparatus comprises a rotary assembly including a vertical shaft and at least one rotatable radial arm attached to the shaft, the radial arm having a distal end adapted to permit tethering of livestock. The apparatus further comprises a powertrain mechanically connected to the rotary assembly and configured to rotate the radial arm at a predefined speed for a predefined time in a predefined tangential direction and to start and stop upon a command of an operator during a working mode of operation. The apparatus further comprises a frame supporting the rotary assembly and powertrain, the frame including a horizontal base adapted to rest upon a surface and resist slippage and tipping during the working mode. The apparatus further comprises at least two rotatable wheels removably mountable to the frame and adapted to support the livestock training apparatus and roll along the surface in a transport mode.Type: ApplicationFiled: November 20, 2020Publication date: March 18, 2021Inventor: Gregory Allen Parker
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Patent number: 9886409Abstract: An integrated circuit device comprises pin resources, a memory controller circuit, a network interface controller circuit, and transmitter circuitry. The pin resources comprise pads coupled to off-chip pins of the integrated circuit device. The memory controller circuit comprises a first interface and the network interface controller circuit comprises a second interface. The transmitter circuitry is configurable to selectively couple either a first signal of the first interface or a second signal of the second interface to a first pad of the pin resources based on a pin distribution between the first interface and the second interface.Type: GrantFiled: May 18, 2015Date of Patent: February 6, 2018Assignee: NVIDIA CorporationInventors: Stephen William Keckler, William J. Dally, Steven Lee Scott, Brucek Kurdo Khailany, Michael Allen Parker
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Patent number: 9860882Abstract: A method of operating an end node to communicate with a central node, the method comprising: wirelessly receiving, a beacon signal periodically-transmitted from the central node; each beacon signal denoting the start of a single frame; each frame being organized to include a downlink (DL) phase which precedes an uplink (UL) phase; and a payload of the beacon signal including an offset which represents a starting time of the UL phase. The method further comprises: generating a message; selecting, unbeknownst to the central node, at least one UL logical-channel, respectively; and wirelessly transmitting, during the UL phase, at least a portion of the message from the end node over the selected at least one UL logical-channel according to a slotted ALOHA technique.Type: GrantFiled: November 2, 2015Date of Patent: January 2, 2018Assignee: LINK LABS, INC.Inventors: Adrian Sapio, Richard Kevin Sawyer, Jr., Allen Parker Welkie, Ricardo Luna, Jr.
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Patent number: 9742869Abstract: A request management subsystem is configured to establish service classes for clients that issue requests for a shared resource on a computer system. The subsystem also is configured to determine the state of the system with respect to bandwidth, current latency, frequency and voltage levels, among other characteristics. Further, the subsystem is configured to evaluate the requirements of each client with respect to latency sensitivity and required bandwidth, among other characteristics. Finally, the subsystem is configured to schedule access to shared resources, based on the priority class of each client, the demands of the application, and the state of the system. With this approach, the subsystem may enable all clients to perform optimally or, alternatively, may cause all clients to experience an equal reduction in performance.Type: GrantFiled: December 9, 2013Date of Patent: August 22, 2017Assignee: NVIDIA CorporationInventors: Evgeny Bolotin, Zvi Guz, Adwait Jog, Stephen William Keckler, Michael Allen Parker
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Publication number: 20170212857Abstract: An integrated circuit device comprises pin resources, a memory controller circuit, a network interface controller circuit, and transmitter circuitry. The pin resources comprise pads coupled to off-chip pins of the integrated circuit device. The memory controller circuit comprises a first interface and the network interface controller circuit comprises a second interface. The transmitter circuitry is configurable to selectively couple either a first signal of the first interface or a second signal of the second interface to a first pad of the pin resources based on a pin distribution between the first interface and the second interface.Type: ApplicationFiled: May 18, 2015Publication date: July 27, 2017Inventors: Stephen William Keckler, William J. Dally, Steven Lee Scott, Brucek Kurdo Khailany, Michael Allen Parker
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Publication number: 20170127403Abstract: A method of operating an end node to communicate with a central node, the method comprising: wirelessly receiving, a beacon signal periodically-transmitted from the central node; each beacon signal denoting the start of a single frame; each frame being organized to include a downlink (DL) phase which precedes an uplink (UL) phase; and a payload of the beacon signal including an offset which represents a starting time of the UL phase. The method further comprises: generating a message; selecting, unbeknownst to the central node, at least one UL logical-channel, respectively; and wirelessly transmitting, during the UL phase, at least a portion of the message from the end node over the selected at least one UL logical-channel according to a slotted ALOHA technique.Type: ApplicationFiled: November 2, 2015Publication date: May 4, 2017Applicant: LINK LABS, LLCInventors: Adrian SAPIO, Richard Kevin SAWYER, Jr., Allen Parker WELKIE, Ricardo LUNA, Jr.
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Publication number: 20160230515Abstract: A system is configured to fracture a formation surrounding a subterranean wellbore. In one example, the system includes a tool string configured to be deployed in the wellbore, and an acoustic pulse generator connected to the tool string and configured to transmit acoustic pressure pulses into the formation. The acoustic pulse generator is configured to generate acoustic pressure pulses with a magnitude of at least 1000 pounds per square inch.Type: ApplicationFiled: December 16, 2013Publication date: August 11, 2016Inventors: Timothy Holiman Hunter, Travis Wayne Cavender, Mark Allen Parker
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Patent number: 9058453Abstract: A system and method are provided for configuring a plurality of pin resources. The method includes identifying a plurality of pin resources of a primary application specific integrated circuit (ASIC) device and configuring the plurality of pin resources based on a pin distribution between a first interface and a second interface, where the first interface provides a first communication path between the primary ASIC device and a first device, and the second interface provides a second communication path between the primary ASIC device and a second device.Type: GrantFiled: May 24, 2013Date of Patent: June 16, 2015Assignee: NVIDIA CorporationInventors: Stephen William Keckler, William J. Dally, Steven Lee Scott, Brucek Kurdo Khailany, Michael Allen Parker
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Publication number: 20150163324Abstract: A request management subsystem is configured to establish service classes for clients that issue requests for a shared resource on a computer system. The subsystem also is configured to determine the state of the system with respect to bandwidth, current latency, frequency and voltage levels, among other characteristics. Further, the subsystem is configured to evaluate the requirements of each client with respect to latency sensitivity and required bandwidth, among other characteristics. Finally, the subsystem is configured to schedule access to shared resources, based on the priority class of each client, the demands of the application, and the state of the system. With this approach, the subsystem may enable all clients to perform optimally or, alternatively, may cause all clients to experience an equal reduction in performance.Type: ApplicationFiled: December 9, 2013Publication date: June 11, 2015Applicant: NVIDIA CORPORATIONInventors: Evgeny BOLOTIN, Zvika GUZ, Adwait JOG, Stephen William KECKLER, Michael Allen PARKER
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Patent number: 8919443Abstract: A method for performing a downhole perforating and fracturing operation from a wellbore (12) positioned within a subterranean formation (18). The method includes locating a perforating gun string (24) within the wellbore (12), detonating a first perforating gun (28) to create a first discrete fracture initiation site (42) in the formation (18), repositioning the perforating gun string (24) within the wellbore (12) and detonating a second perforating gun (30) to create a second discrete fracture initiation site (44) in the formation (18). Thereafter, the method also includes pumping a fracture fluid into the wellbore (12) and propagating a single dominant planar fracture (56, 58) from each of the discrete fracture initiation sites (42, 44).Type: GrantFiled: August 3, 2011Date of Patent: December 30, 2014Assignee: Halliburton Energy Services, Inc.Inventors: Mark Allen Parker, Neil Joseph Modeland, Cam Le, Kenneth Lee Borgen, Douglas Ray Scott
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Publication number: 20140351780Abstract: A system and method are provided for configuring a plurality of pin resources. The method includes identifying a plurality of pin resources of a primary application specific integrated circuit (ASIC) device and configuring the plurality of pin resources based on a pin distribution between a first interface and a second interface, where the first interface provides a first communication path between the primary ASIC device and a first device, and the second interface provides a second communication path between the primary ASIC device and a second device.Type: ApplicationFiled: May 24, 2013Publication date: November 27, 2014Inventors: Stephen William Keckler, William J. Dally, Steven Lee Scott, Brucek Kurdo Khailany, Michael Allen Parker
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Publication number: 20140129237Abstract: Embodiments of methods or apparatus to estimate market-driven medical facility rates and/or charges are provided.Type: ApplicationFiled: November 2, 2012Publication date: May 8, 2014Applicant: QMEDTRIX SYSTEMS, INC.Inventors: Benjamin Ryan Wornell, Frederick William Stephens-Tiley, Erik Richard Nolke, Michael Allen Parker, Merrit Laird Quarum
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Publication number: 20130032347Abstract: A method for performing a downhole perforating and fracturing operation from a wellbore (12) positioned within a subterranean formation (18). The method includes locating a perforating gun string (24) within the wellbore (12), detonating a first perforating gun (28) to create a first discrete fracture initiation site (42) in the formation (18), repositioning the perforating gun string (24) within the wellbore (12) and detonating a second perforating gun (30) to create a second discrete fracture initiation site (44) in the formation (18). Thereafter, the method also includes pumping a fracture fluid into the wellbore (12) and propagating a single dominant planar fracture (56, 58) from each of the discrete fracture initiation sites (42, 44).Type: ApplicationFiled: August 3, 2011Publication date: February 7, 2013Applicant: HALLIBURTON ENERGY SERVICES, INC.Inventors: Mark Allen Parker, Neil Joseph Modeland, Cam Le, Kenneth Lee Borgen, Douglas Ray Scott
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Patent number: D693544Type: GrantFiled: December 14, 2012Date of Patent: November 19, 2013Inventor: Mary Allen Parker
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Patent number: D1017721Type: GrantFiled: July 8, 2022Date of Patent: March 12, 2024Assignee: PLAYPOWER, INC.Inventors: Gabriela Diego-Gomez, Tiffany Zhang, Howard Allen Parker, Craig Phillip Mellott, Lauren Alexandra Menezes
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Patent number: D1022060Type: GrantFiled: July 8, 2022Date of Patent: April 9, 2024Assignee: PLAYPOWER, INC.Inventors: Gabriela Diego-Gomez, Tiffany Zhang, Howard Allen Parker, Craig Phillip Mellott, Lauren Alexandra Menezes