Patents by Inventor Allisa Chiao-Er Lee

Allisa Chiao-Er Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Efficient performance based scheduling mechanism for handling multiple TLB operations
    Patent number: 6728800
    Abstract: A method and apparatus for an efficient performance based scheduling mechanism for handling multiple TLB operations. One method of the present invention comprises prioritizing a first translation lookaside buffer request and a second translation lookaside buffer request for handling. The first request is of a first type and the second request is of a second type. The first type having a higher priority than said second type.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: April 27, 2004
    Assignee: Intel Corporation
    Inventors: Allisa Chiao-Er Lee, Greg S. Mathews