Patents by Inventor Allison J. Olson

Allison J. Olson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250174288
    Abstract: Methods, systems, and devices for setting switching for single-level cells (SLCs) are described. A memory system may receive an access command from a host. The access command may correspond to an SLC block or to a multiple-level cell block. If the access command corresponds to an SLC block, the memory system may modify the access command to include one or more bits indicating a setting to use for performing the access operation corresponding to the access command. The setting may define one or more operating parameters for performing the access operation. The memory system may use bits to indicate the setting that are used to indicate a page address for multiple-level cell blocks. The memory system may issue the access command to a memory device, which may perform the access operation using the setting indicated in the one or more bits included by the memory system.
    Type: Application
    Filed: December 4, 2024
    Publication date: May 29, 2025
    Inventors: Umberto Siciliani, Tao Liu, Ting Luo, Dionisio Minopoli, Giuseppe D'Eliseo, Giuseppe Ferrari, Walter Di Francesco, Antonino Pollio, Luigi Esposito, Anna Scalesse, Allison J. Olson, Anna Chiara Siviero
  • Patent number: 12183407
    Abstract: Methods, systems, and devices for setting switching for single-level cells (SLCs) are described. A memory system may receive an access command from a host. The access command may correspond to an SLC block or to a multiple-level cell block. If the access command corresponds to an SLC block, the memory system may modify the access command to include one or more bits indicating a setting to use for performing the access operation corresponding to the access command. The setting may define one or more operating parameters for performing the access operation. The memory system may use bits to indicate the setting that are used to indicate a page address for multiple-level cell blocks. The memory system may issue the access command to a memory device, which may perform the access operation using the setting indicated in the one or more bits included by the memory system.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: December 31, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Umberto Siciliani, Tao Liu, Ting Luo, Dionisio Minopoli, Giuseppe D'Eliseo, Giuseppe Ferrari, Walter Di Francesco, Antonino Pollio, Luigi Esposito, Anna Scalesse, Allison J. Olson, Anna Chiara Siviero
  • Publication number: 20220406388
    Abstract: Methods, systems, and devices for setting switching for single-level cells (SLCs) are described. A memory system may receive an access command from a host. The access command may correspond to an SLC block or to a multiple-level cell block. If the access command corresponds to an SLC block, the memory system may modify the access command to include one or more bits indicating a setting to use for performing the access operation corresponding to the access command. The setting may define one or more operating parameters for performing the access operation. The memory system may use bits to indicate the setting that are used to indicate a page address for multiple-level cell blocks. The memory system may issue the access command to a memory device, which may perform the access operation using the setting indicated in the one or more bits included by the memory system.
    Type: Application
    Filed: May 4, 2022
    Publication date: December 22, 2022
    Inventors: Umberto Siciliani, Tao Liu, Ting Luo, Dionisio Minopoli, Giuseppe D'Eliseo, Giuseppe Ferrari, Walter Di'Francesco, Antonino Pollio, Luigi Esposito, Anna Scalesse, Allison J. Olson, Anna Chiara Siviero