Patents by Inventor Alok Kumar Lohia

Alok Kumar Lohia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230377124
    Abstract: An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.
    Type: Application
    Filed: August 7, 2023
    Publication date: November 23, 2023
    Inventors: Reynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran
  • Patent number: 11769247
    Abstract: An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: September 26, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Reynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran
  • Patent number: 11490517
    Abstract: Interposer printed circuit boards for power modules and associated methods are disclosed. In at least one illustrative embodiment, a printed circuit board assembly may comprise a printed circuit board, an electrical component mounted on a surface of the printed circuit board, and an interposer printed circuit board mounted on the surface of the printed circuit board. The interposer printed circuit board may comprise a first signal path to transmit a first electrical signal and a second signal path to transmit a second electrical signal that is different from the first electrical signal. The interposer printed circuit board may be configured to provide a standoff to prevent the electrical component from contacting a motherboard when the printed circuit board assembly is mounted to the motherboard.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: November 1, 2022
    Assignee: ABB POWER ELECTRONICS, INC.
    Inventors: John Andrew Trelford, Richard John Yeager, Alok Kumar Lohia, Thang Danh Truong
  • Patent number: 11439013
    Abstract: Interposer printed circuit boards for power modules and associated methods are disclosed. In at least one illustrative embodiment, a printed circuit board assembly may comprise a printed circuit board having a surface, an electrical component mounted on the surface, a pin mounted on the surface, and an interposer printed circuit board mounted on the surface. The electrical component may have a first height orthogonal to the surface. The pin may have a second height orthogonal to the surface, where the second height is greater than the first height. The interposer printed circuit board may comprise a pad and an outer solder bump positioned on the pad. The outer solder bump may be positioned at a third height orthogonal to the surface, where the third height is greater than the first height.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: September 6, 2022
    Assignee: ABB POWER ELECTRONICS, INC.
    Inventors: John Andrew Trelford, Richard John Yeager, Alok Kumar Lohia, Thang Danh Truong
  • Publication number: 20220092767
    Abstract: An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.
    Type: Application
    Filed: December 7, 2021
    Publication date: March 24, 2022
    Inventors: Reynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran
  • Patent number: 11195269
    Abstract: An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: December 7, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Reynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran
  • Publication number: 20210212210
    Abstract: Interposer printed circuit boards for power modules and associated methods are disclosed. In at least one illustrative embodiment, a printed circuit board assembly may comprise a printed circuit board having a surface, an electrical component mounted on the surface, a pin mounted on the surface, and an interposer printed circuit board mounted on the surface. The electrical component may have a first height orthogonal to the surface. The pin may have a second height orthogonal to the surface, where the second height is greater than the first height. The interposer printed circuit board may comprise a pad and an outer solder bump positioned on the pad. The outer solder bump may be positioned at a third height orthogonal to the surface, where the third height is greater than the first height.
    Type: Application
    Filed: March 23, 2021
    Publication date: July 8, 2021
    Inventors: John Andrew Trelford, Richard John Yeager, Alok Kumar Lohia, Thang Danh Truong
  • Patent number: 10993325
    Abstract: Interposer printed circuit boards for power modules and associated methods are disclosed. In at least one illustrative embodiment, a printed circuit board assembly may comprise a printed circuit board having a surface, an electrical component mounted on the surface, a pin mounted on the surface, and an interposer printed circuit board mounted on the surface. The electrical component may have a first height orthogonal to the surface. The pin may have a second height orthogonal to the surface, where the second height is greater than the first height. The interposer printed circuit board may comprise a pad and an outer solder bump positioned on the pad. The outer solder bump may have a third height orthogonal to the surface, where the third height is greater than the first height.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: April 27, 2021
    Assignee: ABB Power Electronics Inc.
    Inventors: John Andrew Trelford, Richard John Yeager, Alok Kumar Lohia, Thang Danh Truong
  • Publication number: 20210037648
    Abstract: Interposer printed circuit boards for power modules and associated methods are disclosed. In at least one illustrative embodiment, a printed circuit board assembly may comprise a printed circuit board having a surface, an electrical component mounted on the surface, a pin mounted on the surface, and an interposer printed circuit board mounted on the surface. The electrical component may have a first height orthogonal to the surface. The pin may have a second height orthogonal to the surface, where the second height is greater than the first height. The interposer printed circuit board may comprise a pad and an outer solder bump positioned on the pad. The outer solder bump may have a third height orthogonal to the surface, where the third height is greater than the first height.
    Type: Application
    Filed: July 31, 2019
    Publication date: February 4, 2021
    Inventors: John Andrew Trelford, Richard John Yeager, Alok Kumar Lohia, Thang Danh Truong
  • Publication number: 20210037649
    Abstract: Interposer printed circuit boards for power modules and associated methods are disclosed. In at least one illustrative embodiment, a printed circuit board assembly may comprise a printed circuit board, an electrical component mounted on a surface of the printed circuit board, and an interposer printed circuit board mounted on the surface of the printed circuit board. The interposer printed circuit board may comprise a first signal path to transmit a first electrical signal and a second signal path to transmit a second electrical signal that is different from the first electrical signal. The interposer printed circuit board may be configured to provide a standoff to prevent the electrical component from contacting a motherboard when the printed circuit board assembly is mounted to the motherboard.
    Type: Application
    Filed: July 31, 2019
    Publication date: February 4, 2021
    Inventors: John Andrew Trelford, Richard John Yeager, Alok Kumar Lohia, Thang Danh Truong
  • Patent number: 10580723
    Abstract: A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals. A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the back side of the terminals each include a contact region which lacks the plating layer.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: March 3, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Reynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran
  • Publication number: 20190295935
    Abstract: A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals. A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the back side of the terminals each include a contact region which lacks the plating layer.
    Type: Application
    Filed: May 30, 2019
    Publication date: September 26, 2019
    Inventors: Reynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran
  • Patent number: 10366947
    Abstract: A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals. A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the back side of the terminals each include a contact region which lacks the plating layer.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: July 30, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Reynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran
  • Patent number: 9768098
    Abstract: A semiconductor device comprising a stack of semiconductor chips. The semiconductor chips have an electrically active side and an opposite electrically inactive side. The active sides bordered by an edge having first lengths and the inactive sides bordered by a parallel edge having a second lengths smaller than the first lengths. A substrate has an assembly pad bordered by a linear edge having a third length equal to or smaller than the first lengths. The inactive chip side attached to the pad so that the edge of the first lengths are parallel to the edge of the third length. The active side of the attached chip forms an overhang over the pad, when the third length is smaller than the first lengths.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: September 19, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Alok Kumar Lohia, Reynaldo Corpuz Javier, Andy Quang Tran
  • Patent number: 9721859
    Abstract: A method of assembling a semi-hermetic semiconductor package includes bonding a semiconductor die having bond pads to a top side of a base region of a package substrate having vertical side walls that are hollow which define an inner open volume (gap) having an adhesive or thermoplastic material therein. There are a plurality of metal terminals providing top terminal contacts on the top side of the base region and bottom terminal contacts on a bottom side or below the base region. The bond pads are coupled to the top terminal contacts. A lid is placed which provides a top for the semiconductor package, where the lid extends to vertically oriented end protrusions so that the protrusions are positioned within the adhesive or thermoplastic material to secure the protrusions within the adhesive or thermoplastic material to provide a seal for the semiconductor package.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: August 1, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Andy Quang Tran, Alok Kumar Lohia, Reynaldo Corpuz Javier
  • Publication number: 20170162489
    Abstract: A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals. A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the hack side of the terminals each include a contact region which lacks the plating layer.
    Type: Application
    Filed: February 21, 2017
    Publication date: June 8, 2017
    Inventors: Reynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran
  • Publication number: 20170062315
    Abstract: A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals. A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the back side of the terminals each include a contact region which lacks the plating layer.
    Type: Application
    Filed: May 24, 2016
    Publication date: March 2, 2017
    Inventors: REYNALDO CORPUZ JAVIER, ALOK KUMAR LOHIA, ANDY QUANG TRAN
  • Publication number: 20170062297
    Abstract: A method of assembling a semi-hermetic semiconductor package includes bonding a semiconductor die having bond pads to a top side of a base region of a package substrate having vertical side walls that are hollow which define an inner open volume (gap) having an adhesive or thermoplastic material therein. There are a plurality of metal terminals providing top terminal contacts on the top side of the base region and bottom terminal contacts on a bottom side or below the base region. The bond pads are coupled to the top terminal contacts. A lid is placed which provides a top for the semiconductor package, where the lid extends to vertically oriented end protrusions so that the protrusions are positioned within the adhesive or thermoplastic material to secure the protrusions within the adhesive or thermoplastic material to provide a seal for the semiconductor package.
    Type: Application
    Filed: September 1, 2015
    Publication date: March 2, 2017
    Inventors: ANDY QUANG TRAN, ALOK KUMAR LOHIA, REYNALDO CORPUZ JAVIER
  • Patent number: 9576886
    Abstract: A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals. A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the back side of the terminals each include a contact region which lacks the plating layer.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: February 21, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Reynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran
  • Publication number: 20160286652
    Abstract: An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Inventors: Reynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran