Patents by Inventor Alon Boner

Alon Boner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080186319
    Abstract: Methods and systems for storing or not storing images in a frame buffer during the provision of images to a screen. In one embodiment, the selective usage of the frame buffer may lead to a reduction in power consumption.
    Type: Application
    Filed: February 5, 2007
    Publication date: August 7, 2008
    Applicant: D.S.P. Group Ltd.
    Inventor: Alon Boner
  • Patent number: 6950977
    Abstract: A system and method for improving error detection and correction for transmitted data. An iterative error detection method is used to determine a relative likelihood that decoded data is an accurate representation of the original data. An independent error correction unit operates on the decoded data and a result from the independent error correction unit is injected into the iterative error detection method to improve the reliability of the error detection method.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: September 27, 2005
    Assignee: 3G.com, Inc.
    Inventors: Yoav Lavi, Alon Boner
  • Patent number: 6625763
    Abstract: A block interleaver is provided using a relatively small register file and a larger random access memory (RAM). In one embodiment, the size of the RAM is larger than the size of the register file by at least one order of magnitude. As a result, the register file consumes significantly less power than the RAM for similar operations. The register file receives a stream of sequential data values and stores the data values in a column order. The data values are then read from the register file in a row order. The data values read from the register file in a row order are then written to the RAM in a row order. The data values are then read from the RAM in a row order, thereby creating an interleaved data stream. In a particular embodiment, the data values are written to the RAM in a staggered row order and read from the RAM in a sequential row order. All accesses to the RAM are performed using the full width of the RAM, such that no unnecessary power is used to access the RAM.
    Type: Grant
    Filed: July 5, 2000
    Date of Patent: September 23, 2003
    Assignee: 3G.com, Inc.
    Inventor: Alon Boner
  • Publication number: 20020166095
    Abstract: A system and method for improving error detection and correction for transmitted data. An iterative error detection method is used to determine a relative likelihood that decoded data is an accurate representation of the original data. An independent error correction unit operates on the decoded data and a result from the independent error correction unit is injected into the iterative error detection method to improve the reliability of the error detection method.
    Type: Application
    Filed: March 15, 2002
    Publication date: November 7, 2002
    Applicant: 3G.com, Inc.
    Inventors: Yoav Lavi, Alon Boner
  • Patent number: 5557538
    Abstract: An MPEG decoder which distributes the processing load to a plurality of processors and units including an external memory and a bus interface unit, a de-multiplexing data processor, an image data processor, an inverse transform and reconstruction processor, and a prediction calculation unit. A video post-processing unit generates video data, and a serial port unit provides an output for audio data.
    Type: Grant
    Filed: May 18, 1994
    Date of Patent: September 17, 1996
    Assignee: Zoran Microelectronics Ltd.
    Inventors: Refael Retter, Moshe Bublil, Gad Shavit, Aharon Gill, Ricardo Jaliff, Ram Ofir, Alon Boner, Oded Ilan, Eliezer Hassut