Abstract: Techniques for rendering the management of processes supported by a storage device are described. In particular, the efficient allocation of storage array processing resources when managing concurrent processes on a storage array is described.

Abstract: A method of controlling storage of content on a storage device includes communicating with a storage device configured to cache content; and determining a storage cost for caching a first set of data objects on the storage device. The determining is based, at least in part, on characteristics of the first set of data objects and on characteristics of the storage device. Also provided is a storage system that includes a storage device capable of caching media content, a storage device agent and a cache manager. The storage device agent is operative to communicate with the storage device and with the cache manager, and to provide a storage cost to the cache manager. The storage device agent determines the storage cost for caching a data object on the storage device based, at least in part, on characteristics of the data object and on characteristics of the storage device.

Abstract: In order to write data to a storage system accessible with a first and second file system, a manager receives a data write request associated with a file. The manager determines if a function supported by the second file system is needed to complete the write request. If so, the file is opened and extended with the first file system. The file is then opened and written to by the second file system. The file is truncated by the first file system, and closed by both file systems. If the second file system function is not needed, the file is opened, written, and closed by the first file system. In order to read data from a storage system using a function supported by the second file system, the second file system's cached storage system index is updated, then the file is opened, read, and closed by the second file system.

Abstract: A controller for one type of NAND flash memory device that emulates another type of NAND flash memory device. The controller may include a host NAND interface to receive host data from a NAND host device, and a data aggregator for aggregating the host data with complementary data, to thereby create device data that is storable in a device page of an array of NAND flash memory cells of the NAND flash memory device. After creating the device data the controller writes the device data into a device page of the NAND flash memory cells. The controller also includes a data parser to parse host data from device data when data read operations are executed by the controller. If required, the controller uses the data parser to parse complementary data from device data to create device data when data writing operations are executed by the controller.

Abstract: A storage device coordinator intercepts a memory command issued by a host device and intended for a target storage device which is one of a plurality of storage devices, and, if the memory command is not optimal, transforms the memory command into one or more storage commands, each being associated with a respective storage device selected from the plurality of storage devices according to an optimization rule. A host device is also provided, which includes the storage device coordinator. A data storage system is also provided, which includes the storage device coordinator.

Abstract: A method of servicing a command sent from a host device file system (HDFS) within a host device (HD) by a local storage device (LSD) in communication with the HD is described. The method includes receiving a first command at the LSD instructing the LSD to execute an operation on associated logical addresses. If the first command is associated with at least a first set of logical addresses, the method includes servicing the first command by the LSD at least by way of sending a second command to a device (RD) external to the LSD that instructs the RD to execute an operation on memory locations within the RD. If the first command is not associated with the first set of logical addresses, the method includes servicing the first command by the LSD only by way of operations executed by the LSD on memory locations within the LSD.

Abstract: The present invention is a method, circuit and system for storing bits on a Non-Volatile Memory (“NVM”) array. According to some embodiments of the present invention, a bit scrambling block may rearrange the received block of bits according to a spreading pattern. An error correction code block may generate an error correction code (“ECC”) based on either the original block of bits or based on the rearranged block of bits, and a data storing circuit may store in the NVM array the ECC and the block of bits from which the ECC was not derived.

Abstract: The present invention is a method, circuit and system for storing bits on a Non-Volatile Memory (“NVM”) array comprising. According to some embodiments of the present invention, a bit scrambling block may rearrange the received block of bits according to a spreading pattern. An error correction code block may generate an error correction code (“ECC”) based on either the original block of bits or based on the rearranged block of bits, and a data storing circuit may store in the NVM array the ECC and the block of bits from which the ECC was not derived.