Abstract: A method and circuit for recovering a clock signal in a receiving station, wherein the receiving station receives packets carrying timing information” (TI) from a transmitting station over a packet switched network, the TI relating to a reference timing source located over the network. The method comprises the steps of: calculating over time, in the receiving station, a “TI Delay” variable based on a relative time difference between a timestamp assigned to a sample of a clock signal generated in the receiving station and the TI; upon detecting a Delay Deviation in the TI Delay, accumulating the Delay Deviation in an “Accumulated Deviation” variable; subtracting the Accumulated Deviation from the TI Delay; adjusting the frequency of the clock signal based on the TI Delay; and upon detecting that the Accumulated Deviation absolute value is smaller than a Zeroing Threshold, zeroing the Accumulated Deviation before subtracting it from the TI Delay.

Abstract: An innovative system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty.

Abstract: An innovative system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty.

Abstract: An innovative system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty.

Abstract: An innovative system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty.