Patents by Inventor Alongkron Kitamorn

Alongkron Kitamorn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for simulated error injection for processor deconfiguration design verification
    Patent number: 6728668
    Abstract: A method and apparatus for simulated error injection for processor deconfiguration design verification is provided. A simulated error condition request is received from a user through software, such as the operating system executing in the multiprocessor data processing system. In response to the requested simulated error condition, an error condition is injected into a processor of the multiprocessor data processing system via instruction execution. In response to the detection of the error condition and execution of error-path code, a processor is deconfigured. The error condition may be injected by executing an instruction to set an error condition bit in an error condition register.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: April 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Alongkron Kitamorn, Charles Andrew McLaughlin, Camvan Thi Nguyen, Jayeshkumar M. Patel