Abstract: A method is provided for operating a station for simultaneous communication over: a first, Frequency Division Duplex (FDD) Radio Access Network (RAN) using a first carrier signal; and a second, Time Division Duplex (TDD) RAN using a second carrier signal at a higher frequency than a frequency of the first carrier signal, wherein transmissions from the station using the first carrier signal cause interference to reception at the station over the second, TDD RAN. The method comprises aligning a timing of transmissions from the station over the first, FDD RAN to a timing for transmissions from the station over the second, TDD RAN.

Abstract: A method is provided for operating a station for simultaneous communication over: a first, Frequency Division Duplex (FDD) Radio Access Network (RAN) using a first carrier signal; and a second, Time Division Duplex (TDD) RAN using a second carrier signal at a higher frequency than a frequency of the first carrier signal, wherein transmissions from the station using the first carrier signal cause interference to reception at the station over the second, TDD RAN. The method comprises aligning a timing of transmissions from the station over the first, FDD RAN to a timing for transmissions from the station over the second, TDD RAN.

Abstract: Methods and circuits for linearly controlling a limited, constant current during startup of LDOs, amplifiers, or DC-to-DC converters independent of load capacitor size and controlling a clean transition without glitches from a constant current (CC) mode during startup to a constant voltage (CV) mode during normal operation (CC-CV method) are disclosed. The constant current control loop and the constant voltage control loop are implemented in such a way that at the end of startup the voltage loop has taken over control and the current loop is moved far away from its active transistor region, allowing a switch of modes to occur without any nasty transitions on the output.

Abstract: Methods and circuits for linearly controlling a limited, constant current during startup of LDOs, amplifiers, or DC-to-DC converters independent of load capacitor size and controlling a clean transition without glitches from a constant current (CC) mode during startup to a constant voltage (CV) mode during normal operation (CC-CV method) are disclosed. The constant current control loop and the constant voltage control loop are implemented in such a way that at the end of startup the voltage loop has taken over control and the current loop is moved far away from its active transistor region, allowing a switch of modes to occur without any nasty transitions on the output.