Patents by Inventor Alphons Litjes
Alphons Litjes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12683622Abstract: A system and method of analog to digital conversion including an adjustable ADC, FIR filter circuitry, and a noise setting controller. The ADC samples an analog input signal to provide digital samples at a sample rate that is Y times an output rate of output digital values. The FIR filter circuitry includes Y taps with Y corresponding coefficients and is configured to filter the digital samples from the ADC and to provide filtered digital samples at the sample rate. decimation circuitry may be included to decimate the filtered digital samples by Y to provide the output digital values. The noise setting controller provides an adjustment value to the ADC to adjust noise contribution of the digital samples provided by the ADC based on corresponding coefficients of the FIR filter circuitry. The ADC is adjusted to reduce noise contribution of digital samples that correspond with higher FIR filter coefficients.Type: GrantFiled: February 7, 2023Date of Patent: July 14, 2026Assignee: NXP B.V.Inventors: Erik Olieman, Alphons Litjes, Robert van Veldhoven
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Patent number: 12587427Abstract: A system and method to process received quadrature signals is presented. A received signal is processed into in-phase and quadrature components. A multiplexer alternately outputs the analog in-phase component signal and the analog quadrature component signal at the output terminal as a multiplexer output signal. An analog-to-digital converter digitizes the signals. A demultiplexer is configured to receive the digital output stream, and, at a frequency determined by a second control signal, alternately output the digital output stream at a first output terminal of the demultiplexer as a digital representation of the in-phase component signal and a second output terminal of the demultiplexer as a digital representation of the quadrature component signal. A filter system is configured to impose a one-half sampling period delay on at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal.Type: GrantFiled: December 19, 2023Date of Patent: March 24, 2026Assignee: NXP B.V.Inventors: Alphons Litjes, Erik Olieman, Thomas Baier, Robert Van Veldhoven, Yuting Shen
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Patent number: 12489453Abstract: A SAR ADC includes a DAC, a comparator and SAR circuitry, where the DAC includes MSBs encoded with first capacitors; a mismatch error shaping capacitor coupled to the MSBs; LSBs encoded with second capacitors, where a first switch set couples bottom capacitor plates of the first capacitors and the mismatch error shaping capacitor to receive an analog input voltage, a high reference voltage, or a low reference voltage in response to first DAC feedback control signals, wherein a second switch set couples bottom capacitor plates of the second capacitors to receive the high reference voltage or the low reference voltage in response to second DAC feedback control signals, and wherein the SAR circuitry is configured to feedback a mismatch error value from a previous SAR conversion cycle to the LSBs sub-DAC during a current sampling cycle.Type: GrantFiled: October 27, 2023Date of Patent: December 2, 2025Assignee: NXP B.V.Inventors: Michael Todd Berens, Alphons Litjes, Erik Olieman
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Publication number: 20250274975Abstract: Systems and methods for performing both wireless communications and wireless sensing in combination are disclosed herein. In one example embodiment, the method includes sending, from a first antenna device of a base station (BS), a plurality of first wireless communication signals respectively during a first plurality of time periods associated respectively with a first plurality of symbols and also a plurality of first wireless sensing signals respectively during a second plurality of time periods associated respectively with a second plurality of symbols. Also, the method includes receiving, at the antenna device, a plurality of second wireless communication signals respectively during a third plurality of time periods associated respectively with a third plurality of symbols and also a plurality of second wireless sensing signals respectively during the second plurality of time periods. The second plurality of time periods are interleaved among respective pairs of the first plurality of time periods.Type: ApplicationFiled: May 14, 2025Publication date: August 28, 2025Inventors: Alexander Vogt, Alphons Litjes, Cristian Pavao Moreira
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Patent number: 12381317Abstract: Systems and methods are provided for performing both wireless communications and wireless sensing in combination. The systems include at least a first base station having at least one antenna device where the antenna device includes a beamformer control unit that uses a modifiable lookup table to control beam characteristics. The system may send a first set of electromagnetic sensing beams to a first environmental area within a field of view of the at least one antenna device to detect environmental objects within the environmental area. Based on data received by the antenna device, the system may generate a modified lookup table.Type: GrantFiled: May 2, 2023Date of Patent: August 5, 2025Assignee: NXP B.V.Inventors: Alphons Litjes, Alexander Vogt, Cristian Pavao Moreira
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Patent number: 12355454Abstract: An analog to digital converter including a digital to analog converter (DAC), a comparator, and a controller. The DAC includes a sample node and a capacitor array controlled by a digital control input. The comparator compares a voltage of the sample node with a reference voltage to generate a comparison value. The controller presets the digital control input, prompts the DAC to sample the input voltage onto the sample node, resets the digital control input, and performs a conversion by successively adjusting the digital control input based on the comparison value to determine a digital output. A preset value is subtracted from the digital output to provide an adjusted digital output. A sample predictor predicts the next sample to determine the preset value used to adjust the sample node within a full scale range after DAC reset.Type: GrantFiled: June 2, 2023Date of Patent: July 8, 2025Assignee: NXP B.V.Inventors: Alphons Litjes, Erik Olieman
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Publication number: 20250198961Abstract: Pixelated capacitive sensor systems and methods of operating pixelated capacitive sensor systems are provided. Pixelated capacitive sensor systems include a sensor array including a plurality of sense capacitors and a top plate, a comparator operatively connected to each sense capacitor and the top plate of the sensor array, a switch matrix operatively connected to each sense capacitor and the top plate of the sensor array, and a digital controller operatively connected to the comparator and the switch matrix. A read-out circuit may be formed by the sensor array, the comparator, the digital controller, and the switch matrix. Methods of operating pixelated capacitive sensor systems include providing a capacitive sensor system, sampling by the capacitive sensor system, toggling the sense capacitors by the digital controller, and running a conversion algorithm by the digital controller.Type: ApplicationFiled: December 18, 2023Publication date: June 19, 2025Inventors: Alphons Litjes, Ashwin Bhat, Erik Olieman, Franciscus Petrus Widdershoven
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Publication number: 20250202757Abstract: A system and method to process received quadrature signals is presented. A received signal is processed into in-phase and quadrature components. A multiplexer alternately outputs the analog in-phase component signal and the analog quadrature component signal at the output terminal as a multiplexer output signal. An analog-to-digital converter digitizes the signals. A demultiplexer is configured to receive the digital output stream, and, at a frequency determined by a second control signal, alternately output the digital output stream at a first output terminal of the demultiplexer as a digital representation of the in-phase component signal and a second output terminal of the demultiplexer as a digital representation of the quadrature component signal. A filter system is configured to impose a one-half sampling period delay on at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal.Type: ApplicationFiled: December 19, 2023Publication date: June 19, 2025Inventors: Alphons Litjes, Erik Olieman, Thomas Baier, Robert Van Veldhoven, Yuting Shen
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Patent number: 12336006Abstract: Systems and methods for performing both wireless communications and wireless sensing in combination are disclosed herein. In one example embodiment, the method includes sending, from a first antenna device of a base station (BS), a plurality of first wireless communication signals respectively during a first plurality of time periods associated respectively with a first plurality of symbols and also a plurality of first wireless sensing signals respectively during a second plurality of time periods associated respectively with a second plurality of symbols. Also, the method includes receiving, at the antenna device, a plurality of second wireless communication signals respectively during a third plurality of time periods associated respectively with a third plurality of symbols and also a plurality of second wireless sensing signals respectively during the second plurality of time periods. The second plurality of time periods are interleaved among respective pairs of the first plurality of time periods.Type: GrantFiled: September 16, 2022Date of Patent: June 17, 2025Assignee: NXP B.V.Inventors: Alexander Vogt, Alphons Litjes, Cristian Pavao Moreira
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Publication number: 20250141457Abstract: A SAR ADC includes a DAC, a comparator and SAR circuitry, where the DAC includes MSBs encoded with first capacitors; a mismatch error shaping capacitor coupled to the MSBs; LSBs encoded with second capacitors, where a first switch set couples bottom capacitor plates of the first capacitors and the mismatch error shaping capacitor to receive an analog input voltage, a high reference voltage, or a low reference voltage in response to first DAC feedback control signals, wherein a second switch set couples bottom capacitor plates of the second capacitors to receive the high reference voltage or the low reference voltage in response to second DAC feedback control signals, and wherein the SAR circuitry is configured to feedback a mismatch error value from a previous SAR conversion cycle to the LSBs sub-DAC during a current sampling cycle.Type: ApplicationFiled: October 27, 2023Publication date: May 1, 2025Inventors: Michael Todd Berens, Alphons Litjes, Erik Olieman
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Patent number: 12250570Abstract: Systems and methods for performing both wireless communications and wireless sensing in combination are disclosed herein. In one example embodiment, the system includes a base station (BS) including each of at least one antenna device including a first antenna device and at least one control unit. The control unit includes an input port coupled at least indirectly to the first antenna device, an output port, and a controllable circuit including each of a spillover cancellation circuit and a bypass circuit. The BS is configured to operate in each of a communication mode and a sensing mode. When the BS operates in the sensing mode, the spillover cancellation circuit of the controllable circuit is enabled and performs spillover cancellation. When the BS operates in a communication mode, the bypass circuit operates so that the spillover cancellation circuit is bypassed or otherwise does not affect how the output signal is generated.Type: GrantFiled: September 16, 2022Date of Patent: March 11, 2025Assignee: NXP B.V.Inventors: Cristian Pavao Moreira, Alphons Litjes, Alexander Vogt
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Publication number: 20240405780Abstract: An analog to digital converter including a digital to analog converter (DAC), a comparator, and a controller. The DAC includes a sample node and a capacitor array controlled by a digital control input. The comparator compares a voltage of the sample node with a reference voltage to generate a comparison value. The controller presets the digital control input, prompts the DAC to sample the input voltage onto the sample node, resets the digital control input, and performs a conversion by successively adjusting the digital control input based on the comparison value to determine a digital output. A preset value is subtracted from the digital output to provide an adjusted digital output. A sample predictor predicts the next sample to determine the preset value used to adjust the sample node within a full scale range after DAC reset.Type: ApplicationFiled: June 2, 2023Publication date: December 5, 2024Inventors: Alphons Litjes, Erik Olieman
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Patent number: 12109897Abstract: In an embodiment, there is provided a battery management method for a vehicle comprising a plurality of batteries. According to another embodiment there is a control unit for performing the battery management method. The battery management method comprising detecting an incoming hazard; predicting an impact of the incoming hazard from one or more sensors coupled to the vehicle; determining a course of action to be taken in response to the predicted impact; and controlling one or more batteries of the plurality of batteries according to the determined course of action.Type: GrantFiled: March 31, 2023Date of Patent: October 8, 2024Assignee: NXP B.V.Inventors: Alphons Litjes, Hendrik Johannes Bergveld, Alexander Vogt, Cristian Pavao Moreira
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Publication number: 20240267056Abstract: A system and method of analog to digital conversion including an adjustable ADC, FIR filter circuitry, and a noise setting controller. The ADC samples an analog input signal to provide digital samples at a sample rate that is Y times an output rate of output digital values. The FIR filter circuitry includes Y taps with Y corresponding coefficients and is configured to filter the digital samples from the ADC and to provide filtered digital samples at the sample rate. decimation circuitry may be included to decimate the filtered digital samples by Y to provide the output digital values. The noise setting controller provides an adjustment value to the ADC to adjust noise contribution of the digital samples provided by the ADC based on corresponding coefficients of the FIR filter circuitry. The ADC is adjusted to reduce noise contribution of digital samples that correspond with higher FIR filter coefficients.Type: ApplicationFiled: February 7, 2023Publication date: August 8, 2024Inventors: Erik Olieman, Alphons Litjes, Robert van Veldhoven
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Publication number: 20230361464Abstract: Systems and methods are provided for performing both wireless communications and wireless sensing in combination. The systems include at least a first base station having at least one antenna device where the antenna device includes a beamformer control unit that uses a modifiable lookup table to control beam characteristics. The system may send a first set of electromagnetic sensing beams to a first environmental area within a field of view of the at least one antenna device to detect environmental objects within the environmental area. Based on data received by the antenna device, the system may generate a modified lookup table.Type: ApplicationFiled: May 2, 2023Publication date: November 9, 2023Inventors: Alphons Litjes, Alexander Vogt, Cristian Pavao Moreira
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Publication number: 20230331090Abstract: In an embodiment, there is provided a battery management method for a vehicle comprising a plurality of batteries. According to another embodiment there is a control unit for performing the battery management method. The battery management method comprising detecting an incoming hazard; predicting an impact of the incoming hazard from one or more sensors coupled to the vehicle; determining a course of action to be taken in response to the predicted impact; and controlling one or more batteries of the plurality of batteries according to the determined course of action.Type: ApplicationFiled: March 31, 2023Publication date: October 19, 2023Inventors: Alphons Litjes, Hendrik Johannes Bergveld, Alexander Vogt, Cristian Pavao Moreira
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Publication number: 20230117789Abstract: Systems and methods for performing both wireless communications and wireless sensing in combination are disclosed herein. In one example embodiment, the method includes sending, from a first antenna device of a base station (BS), a plurality of first wireless communication signals respectively during a first plurality of time periods associated respectively with a first plurality of symbols and also a plurality of first wireless sensing signals respectively during a second plurality of time periods associated respectively with a second plurality of symbols. Also, the method includes receiving, at the antenna device, a plurality of second wireless communication signals respectively during a third plurality of time periods associated respectively with a third plurality of symbols and also a plurality of second wireless sensing signals respectively during the second plurality of time periods. The second plurality of time periods are interleaved among respective pairs of the first plurality of time periods.Type: ApplicationFiled: September 16, 2022Publication date: April 20, 2023Inventors: Alexander Vogt, Alphons Litjes, Cristian Pavao Moreira
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Publication number: 20230122173Abstract: Systems and methods for performing both wireless communications and wireless sensing in combination are disclosed herein. In one example embodiment, the system includes a base station (BS) including each of at least one antenna device including a first antenna device and at least one control unit. The control unit includes an input port coupled at least indirectly to the first antenna device, an output port, and a controllable circuit including each of a spillover cancellation circuit and a bypass circuit. The BS is configured to operate in each of a communication mode and a sensing mode. When the BS operates in the sensing mode, the spillover cancellation circuit of the controllable circuit is enabled and performs spillover cancellation. When the BS operates in a communication mode, the bypass circuit operates so that the spillover cancellation circuit is bypassed or otherwise does not affect how the output signal is generated.Type: ApplicationFiled: September 16, 2022Publication date: April 20, 2023Inventors: Cristian Pavao Moreira, Alphons Litjes, Alexander Vogt
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Patent number: 10958282Abstract: A capacitive sampling circuit comprises: a first-differential-input-terminal, configured to receive a first one of a pair of differential-input-signals; a second-differential-input-terminal, configured to receive the other one of the pair of differential-input-signals; a capacitive-circuit-output-terminal, configured to provide a sampled-output-signal; a plurality of first-sampling-capacitors, each having a first-plate and a second-plate; a plurality of reference-voltage-terminals, each configured to receive a respective reference-voltage; and a first-capacitor-first-plate-switching-block configured to selectively connect the first-plate of each of the plurality of first-sampling-capacitors to either: (i) the first-differential-input-terminal; or (ii) a respective one of the plurality of reference-voltage-terminals; and a first-capacitor-second-plate-switch, configured to selectively connect or disconnect the second-plate of each of the plurality of first-sampling-capacitors to the second-differential-input-tType: GrantFiled: March 10, 2020Date of Patent: March 23, 2021Assignee: NXP B.V.Inventors: Erik Olieman, Alphons Litjes, Leon van der Dussen
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Patent number: 10938401Abstract: Embodiments of an analog-to-digital converter (ADC), resistive digital-to-analog converter (DAC) circuits, and methods of operating an ADC are disclosed. In an embodiment, an analog-to-digital converter includes a DAC unit configured to convert a digital code to a first voltage in response to an input voltage of the ADC, a comparator configured to compare the first voltage with a second voltage to generate a comparison output, and a logic circuit configured to generate the digital code, to control the DAC unit based on the comparison output, and to output the digital code as a digital output of the ADC. The DAC unit includes a capacitive DAC and multiple resistive DACs. Each of the resistive DACs is connected to the first voltage through a respective capacitor.Type: GrantFiled: November 25, 2019Date of Patent: March 2, 2021Assignee: NXP B.V.Inventors: Erik Olieman, Alphons Litjes, Ibrahim Candan