Abstract: A multi-port tester interface is coupled between an interface port tester ving only one test port and a plurality of interface ports to be tested. The multi-port tester interface includes timing and control logic which provides an initialization signal to the interface port tester. The timing and control logic controls an interface port selector to provide an interface port address to a test signal multiplexer and an input multiplexer. A test signal from the interface port tester is transmitted to the appropriate interface port under test through the test signal multiplexer. A successful test completion signal is received by the appropriate input of the test completion multiplexer as selected by the address provided by the interface port selector, and provided to an input port of the interface port tester.