Patents by Inventor Alvin Pshaenich

Alvin Pshaenich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4420700
    Abstract: A semiconductor current regulating and switching apparatus is described wherein an NMOS enhancement mode power transistor is used in the positive lead to regulate the flow of current from a power source to a load. In order to achieve a low resistance on-state for the NMOS power transistor, the control gate must be biased to a voltage which exceeds the positive voltage of the power source. This bias voltage is generated within the apparatus.
    Type: Grant
    Filed: May 26, 1981
    Date of Patent: December 13, 1983
    Assignee: Motorola Inc.
    Inventors: Gary V. Fay, Alvin Pshaenich