Patents by Inventor Amélie DUSSAIGNE
Amélie DUSSAIGNE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240297204Abstract: A method for producing a native emission matrix including the following steps of: a) providing a base structure including, successively, a substrate, a GaN layer, a doped In(x)GaN layer where x is from 0 to 8%, and an unintentionally doped In(x)GaN epitaxial regrowth layer; b) patterning mesas in the base structure, the mesas comprising a portion of the doped In(x)GaN layer and the unintentionally doped In(x)GaN epitaxial regrowth layer, whereby the mesas are electrically interconnected with one another; c) porosifying electrochemically the doped In(x)GaN layer; and d) carrying out a first LED structure and a second LED structure on the mesas, whereby a first LED having a first emission wavelength, and a second LED having a second emission wavelength, respectively, are obtained, and a native emission matrix is formedType: ApplicationFiled: June 13, 2022Publication date: September 5, 2024Inventors: Amélie DUSSAIGNE, Patrick LE MAITRE, Helge HAAS, Ludovic DUPRE, Carole PERNEL
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Publication number: 20240213398Abstract: A method for manufacturing a growth substrate adapted to produce by epitaxy a matrix of diodes based on InGaN, including the following steps of: producing a crystalline stack including, from a conductive buffer layer: a lower layer based on doped GaN; then a separation intermediate layer, based on InGaN; then an upper layer (14) based on AlGaN; producing mesas of three categories M1, M2, M3, by localised etching of the crystalline stack; eliminating, by etching, the upper portion of at least the mesas M3, the upper portion of the mesas M1 being preserved; then non-photo-assisted electrochemically porosifying the lower portions of only the mesas M1 and M3, the lower portion of the mesas M2 being non-porosified.Type: ApplicationFiled: December 19, 2023Publication date: June 27, 2024Inventors: Fabian ROL, Amélie DUSSAIGNE
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Publication number: 20240203731Abstract: A method including the following successive steps: a) forming, on a surface of a support substrate, a first layer made of a material selected from among a lamellar dichalcogenide or a lamellar chalcogenide including a stack of sheets; b) forming, by physical vapor deposition on the side of said surface of the support substrate, a second layer made of a first III-N semiconductor material coating the first layer; and c) carrying out a thermo-chemical treatment of the first layer resulting, in the first layer, in a conversion of van der Waals bonds between the sheets of the first layer into covalent bonds.Type: ApplicationFiled: December 13, 2023Publication date: June 20, 2024Applicant: Commissariat à I'Énergie Atomique et aux Énergies AlternativesInventors: Rémy Gassilloud, Julien Patouillard, Bérangére Hyot, Amélie Dussaigne, Stéphane Cadot, Matthew Charles, François Martin, Nicolas Gauthier, Christine Raynaud
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Publication number: 20240186444Abstract: A method for manufacturing a growth substrate, including producing mesas based on GaN having various porosification levels, implementing differentiated steps of electrochemical porosification, non-photoassisted and photoassisted, of various portions of the mesas.Type: ApplicationFiled: November 29, 2023Publication date: June 6, 2024Inventors: Ludovic DUPRE, Amélie DUSSAIGNE, Carole PERNEL, Fabian ROL
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Publication number: 20240153986Abstract: A growth substrate adapted for making by epitaxy an array of InGaN based diodes, including mesas M(i), made of GaN based crystalline materials, each including N doped layers, with N?2, separated in pairs by an insulation intermediate layer made of a non-porous material, and each having a free upper face adapted for making a diode of the array by epitaxy; the mesas being configured according to at least three different categories including: a so-called M(N) mesas category where the N doped layers are porous; a so-called M(0) mesas category where none of the doped layers (13, 15) is porous; and a so-called M(n) mesas category where n doped layers are porous, with 1?n<N.Type: ApplicationFiled: October 26, 2023Publication date: May 9, 2024Inventors: Ludovic Dupre, Amélie Dussaigne, Carole Pernel, Fabien Rol
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Publication number: 20230369541Abstract: A process comprising the following steps of: a) providing a device comprising: a GaN/InGaN structure comprising an electrically conductive doped GaN layer locally covered with InGaN mesas comprising a doped InGaN layer and an undoped or weakly doped InGaN layer, an electrically insulating layer covering the electrically conductive doped GaN layer between the mesas, b) connecting the electrically conductive doped GaN layer and a counter-electrode (500) to a voltage or current generator, c) dipping the device and the counter-electrode into an electrolyte solution, d) applying a voltage or current between the electrically conductive doped GaN layer and the second electrode to porosify the doped InGaN layer, e) forming an InGaN layer by epitaxy on the InGaN mesas, whereby a relaxed epitaxially grown InGaN layer is obtained.Type: ApplicationFiled: July 27, 2023Publication date: November 16, 2023Inventors: Carole Pernel, Amélie Dussaigne
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Publication number: 20230361246Abstract: A method for manufacturing a substrate comprising the following steps of: providing a stack comprising an initial substrate, a GaN layer, a doped InGaN layer and an unintentionally doped InGaN layer, transferring the doped InGaN layer and the unintentionally doped InGaN layer to an anodising support, so as to form a second stack, dipping the second stack and the counter-electrode into an electrolyte solution, and applying a voltage or current between the doped InGaN layer and a counter electrode, to porosify the doped InGaN layer, and relaxing the unintentionally doped InGaN layer, transferring the doped InGaN layer and the unintentionally doped InGaN layer to a support of interest, forming an InGaN layer by epitaxy on the unintentionally doped InGaN layer, whereby a relaxed epitaxially grown InGaN layer is obtained.Type: ApplicationFiled: July 7, 2023Publication date: November 9, 2023Inventors: Carole Pernel, Amélie Dussaigne
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Patent number: 11749779Abstract: A process comprising the following steps of: a) providing a device comprising: a GaN/InGaN structure comprising an electrically conductive doped GaN layer locally covered with InGaN mesas comprising a doped InGaN layer and an undoped or weakly doped InGaN layer, an electrically insulating layer covering the electrically conductive doped GaN layer between the mesas, b) connecting the electrically conductive doped GaN layer and a counter-electrode (500) to a voltage or current generator, c) dipping the device and the counter-electrode into an electrolyte solution, d) applying a voltage or current between the electrically conductive doped GaN layer and the second electrode to porosify the doped InGaN layer, e) forming an InGaN layer by epitaxy on the InGaN mesas, whereby a relaxed epitaxially grown InGaN layer is obtained.Type: GrantFiled: December 16, 2020Date of Patent: September 5, 2023Assignee: COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVESInventors: Carole Pernel, Amélie Dussaigne
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Patent number: 11735693Abstract: A method for manufacturing a substrate comprising the following steps of: providing a stack comprising an initial substrate, a GaN layer, a doped InGaN layer and an unintentionally doped InGaN layer, transferring the doped InGaN layer and the unintentionally doped InGaN layer to an anodising support, so as to form a second stack, dipping the second stack and the counter-electrode into an electrolyte solution, and applying a voltage or current between the doped InGaN layer and a counter electrode, to porosify the doped InGaN layer, and relaxing the unintentionally doped InGaN layer, transferring the doped InGaN layer and the unintentionally doped InGaN layer to a support of interest, forming an InGaN layer by epitaxy on the unintentionally doped InGaN layer, whereby a relaxed epitaxially grown InGaN layer is obtained.Type: GrantFiled: December 16, 2020Date of Patent: August 22, 2023Assignee: COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVESInventors: Carole Pernel, Amélie Dussaigne
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Publication number: 20220406968Abstract: A method for manufacturing a native emission matrix, comprising the following steps: a) providing a base structure comprising a substrate, a layer of GaN, a layer of doped In(x)GaN and an epitaxial regrowth layer of nid In(x)GaN, b) structuring first and second mesas in the base structure, the first mesa comprising a part of the layer of GaN, the layer of doped In(x)GaN and the epitaxial regrowth layer of not-intentionally doped In(x)GaN, the second mesa comprising a part of the layer of doped In(x)GaN and the epitaxial regrowth layer of not-intentionally doped In(x)GaN, c) electrochemically porosifying the second mesa, d) producing stacks on the mesas to form LED structures emitting at various wavelengths.Type: ApplicationFiled: June 10, 2022Publication date: December 22, 2022Inventors: Ludovic Dupre, Carole Pernel, Amélie Dussaigne, Patrick Le Maitre
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Publication number: 20220393065Abstract: A method for manufacturing a relaxed epitaxial InGaN layer from a GaN/InGaN substrate comprising the following steps: a) providing a first stack comprising a GaN or InGaN layer to be porosified and a barrier layer, b) transferring the GaN or InGaN layer to be porosified and the barrier layer to a porosification support, in such a way as to form a second stack, c) forming a mask on the GaN or InGaN layer to be porosified, d) porosifying the GaN or InGaN layer through the mask, e) transferring the GaN or InGaN porosified layer and the barrier layer to a support of interest, f) forming an InGaN layer by epitaxy on the barrier layer, whereby a relaxed epitaxial InGaN layer is obtained.Type: ApplicationFiled: June 6, 2022Publication date: December 8, 2022Inventors: Amélie Dussaigne, Benjamin Damilano, Carole Pernel, Stéphane Vezian
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Patent number: 11495710Abstract: A method for producing a patterned layer of material includes producing a first substrate having a patterned face, producing, against the patterned face of the first substrate, a stack of layers having an intermediate layer and the layer to be patterned, the intermediate layer being disposed between the layer to be patterned and the first substrate, a first face of the intermediate layer disposed on the first substrate side being patterned in accordance with a design that is the inverse of that of the patterned face of the first substrate, and removing the first substrate. The intermediate layer is anisotropically etched from the first face of the intermediate layer, and at least part of the thickness of the layer to be patterned is etched, patterning a face of the layer to be patterned in accordance with the design of the first face of the intermediate layer.Type: GrantFiled: December 2, 2020Date of Patent: November 8, 2022Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Adrien Gasse, Amélie Dussaigne, François Levy
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Patent number: 11424386Abstract: A light-emitting device including first, second, and third pixels, wherein: the first pixel includes a two-dimensional light-emitting cell including a vertical stack of a first semiconductor layer of a first conductivity type, of an active layer, and of a second semiconductor layer of the second conductivity type; each of the second and third pixels includes a three-dimensional light-emitting cell including a plurality of nanostructures of same dimensions regularly distributed across the surface of the pixel, each nanostructure including a doped pyramidal semiconductor core of the first conductivity type, an active layer coating the lateral walls of the core, and a doped semiconductor layer of the second conductivity type coating the active layer; and the nanostructures of the second and third pixels have different dimensions and/or a different spacing.Type: GrantFiled: October 22, 2019Date of Patent: August 23, 2022Assignee: Commissariat á l'Énergie Atomique et aux Énergies AlternativesInventor: Amélie Dussaigne
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Patent number: 11162188Abstract: The invention relates to a method for manufacturing a layer of interest (3) in a III-N crystalline compound by epitaxy from a layer of graphene (2), characterized in that it comprises, prior to a phase of nucleation of the layer of interest (3), a step of thermal treatment of the layer of graphene (2) in which it is subjected to a first temperature (Ttt) no lower than 1050° C. and to a stream of ammonia.Type: GrantFiled: July 9, 2018Date of Patent: November 2, 2021Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Timotee Journot, Berangere Hyot, Armelle Even, Amelie Dussaigne, Bruno-Jules Daudin
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Publication number: 20210193870Abstract: A process comprising the following steps of: a) providing a device comprising: a GaN/InGaN structure comprising an electrically conductive doped GaN layer locally covered with InGaN mesas comprising a doped InGaN layer and an undoped or weakly doped InGaN layer, an electrically insulating layer covering the electrically conductive doped GaN layer between the mesas, b) connecting the electrically conductive doped GaN layer and a counter-electrode (500) to a voltage or current generator, c) dipping the device and the counter-electrode into an electrolyte solution, d) applying a voltage or current between the electrically conductive doped GaN layer and the second electrode to porosify the doped InGaN layer, e) forming an InGaN layer by epitaxy on the InGaN mesas, whereby a relaxed epitaxially grown InGaN layer is obtained.Type: ApplicationFiled: December 16, 2020Publication date: June 24, 2021Inventors: Carole Pernel, Amélie Dussaigne
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Publication number: 20210193873Abstract: A method for manufacturing a substrate comprising the following steps of: providing a stack comprising an initial substrate, a GaN layer, a doped InGaN layer and an unintentionally doped InGaN layer, transferring the doped InGaN layer and the unintentionally doped InGaN layer to an anodising support, so as to form a second stack, dipping the second stack and the counter-electrode into an electrolyte solution, and applying a voltage or current between the doped InGaN layer and a counter electrode, to porosify the doped InGaN layer, and relaxing the unintentionally doped InGaN layer, transferring the doped InGaN layer and the unintentionally doped InGaN layer to a support of interest, forming an InGaN layer by epitaxy on the unintentionally doped InGaN layer, whereby a relaxed epitaxially grown InGaN layer is obtained.Type: ApplicationFiled: December 16, 2020Publication date: June 24, 2021Inventors: Carole Pernel, Amélie Dussaigne
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Publication number: 20210184078Abstract: Method for producing a patterned layer of material, comprising; producing a first substrate having a patterned face; producing, against the patterned face of the first substrate, a stack of layers comprising an intermediate layer and the layer to be patterned, the intermediate layer being disposed between the layer to be patterned and the first substrate, a first face of the intermediate layer disposed on the first substrate side being patterned in accordance with a design that is the inverse of that of the patterned face of the first substrate; removing the first substrate; anisotropic etching the intermediate layer from the first face of the intermediate layer, and etching at least part of the thickness of the layer to be patterned, patterning a face of the layer to be patterned in accordance with the design of the first face of the intermediate layer.Type: ApplicationFiled: December 2, 2020Publication date: June 17, 2021Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Adrien GASSE, Amélie DUSSAIGNE, François LEVY
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Publication number: 20210115589Abstract: The invention relates to a method for manufacturing a layer of interest (3) in a III-N crystalline compound by epitaxy from a layer of graphene (2), characterized in that it comprises, prior to a phase of nucleation of the layer of interest (3), a step of thermal treatment of the layer of graphene (2) in which it is subjected to a first temperature (Ttt) no lower than 1050° C. and to a stream of ammonia.Type: ApplicationFiled: July 9, 2018Publication date: April 22, 2021Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Timotee JOURNOT, Berangere HYOT, Armelle EVEN, Amelie DUSSAIGNE, Bruno-Jules DAUDIN
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Patent number: 10886429Abstract: The invention relates to a method of manufacturing an optoelectronic device (1) produced on the basis of GaN, comprising an emission structure (10) configured to emit a first light radiation at the first wavelength (?1), the method comprising the following steps: i. producing a growth structure (20) comprising a nucleation layer (23) of Inx2Ga1-x2N at least partially relaxed; ii. producing a conversion structure (30), comprising an emission layer (33) configured to emit light at a second wavelength (?2), and an absorption layer (34) produced on the basis of InGaN; iii. transfer of the conversion structure (30) onto the emission structure (10) in such a way that the absorption layer (34) is located between the emission structure (10) and the emission layer (33) of the conversion structure.Type: GrantFiled: December 18, 2018Date of Patent: January 5, 2021Assignees: Commissariat a l'energie atomique et aux energies alternatives, THALESInventors: Amelie Dussaigne, Ivan-Christophe Robin
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Publication number: 20200135976Abstract: A light-emitting device including first, second, and third pixels, wherein: the first pixel includes a two-dimensional light-emitting cell including a vertical stack of a first semiconductor layer of a first conductivity type, of an active layer, and of a second semiconductor layer of the second conductivity type; each of the second and third pixels includes a three-dimensional light-emitting cell including a plurality of nanostructures of same dimensions regularly distributed across the surface of the pixel, each nanostructure including a doped pyramidal semiconductor core of the first conductivity type, an active layer coating the lateral walls of the core, and a doped semiconductor layer of the second conductivity type coating the active layer; and the nanostructures of the second and third pixels have different dimensions and/or a different spacing.Type: ApplicationFiled: October 22, 2019Publication date: April 30, 2020Applicant: Commissariat à l'Énergie Atomique et aux Énergies AlternativesInventor: Amélie Dussaigne