Patents by Inventor Amaia ANORGA

Amaia ANORGA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9769476
    Abstract: A digital receiver includes a pre-de-interleaver processing block for receiving a receive signal including reception data units quantized using a quantization rule. The digital receiver additionally includes a controllable compressor for compressing the data units into a compressed representation, a controllable time-de-interleaver being configured for applying a varying interleaving size in data units, and a controller for controlling the controllable processor or the controllable time-de-interleaver. The controller is configured for controlling the compressor or the time-de-interleaver so that a higher interleaving size such as a higher interleaving time or a higher number of data units per second is applied, when a compression in a lower number of bits is active.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: September 19, 2017
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Marco Breiling, Holger Stadali, Amaia Anorga Gomez
  • Publication number: 20140119473
    Abstract: A transmitter for transmitting information has a mapper for generating a plurality of mapped symbols, each mapped symbol having a first component and a second component, one of the first and second components being an in-phase component and the other of the first and second components being a quadrature component from a codeword; and a component interleaver for generating a plurality of interleaving units to be transmitted in a time sequence, the plurality of interleaving units consisting of at least three different interleaving units, wherein an interleaving unit has a plurality of pairs of first and second components, wherein the component interleaver is configured for assigning all first components and all second components of a codeword to the plurality of interleaving units in accordance with an interleaving rule, so that an I component of an mapped symbol and the Q component of the same mapped symbol are never assigned to one and the same interleaving unit, but to two different interleaving units.
    Type: Application
    Filed: December 6, 2013
    Publication date: May 1, 2014
    Inventors: Marco Breiling, Amaia Anorga Gomez, Holger Stadali
  • Publication number: 20140009322
    Abstract: A calculator for obtaining motion parameters of the target, wherein the calculator is configured to obtain the one or more motion parameters on the basis of at least two time differences. The first time difference describes a timing of passings of a first pair of transmitter-receiver-lines by the target, and the second time difference describes a timing of passings of a second pair of transmitter-receiver-lines by the target, wherein the second pair of the transmitter-receiver-lines is different from the first pair of transmitter-receiver-lines.
    Type: Application
    Filed: July 18, 2012
    Publication date: January 9, 2014
    Applicant: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Ion SUBERVIOLA, Amaia ANORGA
  • Publication number: 20130329811
    Abstract: A digital receiver includes a pre-de-interleaver processing block for receiving a receive signal including reception data units quantized using a quantization rule. The digital receiver additionally includes a controllable compressor for compressing the data units into a compressed representation, a controllable time-de-interleaver being configured for applying a varying interleaving size in data units, and a controller for controlling the controllable processor or the controllable time-de-interleaver. The controller is configured for controlling the compressor or the time-de-interleaver so that a higher interleaving size such as a higher interleaving time or a higher number of data units per second is applied, when a compression in a lower number of bits is active.
    Type: Application
    Filed: August 15, 2013
    Publication date: December 12, 2013
    Applicant: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Marco BREILING, Holger STADALI, Amaia ANORGA GOMES