Abstract: A memory address monitoring device for monitoring a memory includes an address determining module and an identification determining module. A first process has a first process identification and issues a request address to access the memory. The memory saves data of a second process between a beginning address and an ending address of the memory. The second process has a second process identification. In this device, the address determining module receives the request address and determines whether the request address is located between the beginning address and the ending address to generate an address determining result. The identification determining module receives the address determining result, the first process identification and the second process identification, and compares the first process identification with the second process identification to generate an identification determining result when the address determining result is true.

Abstract: A decoding device includes a variable-length decoding circuit, a first buffer, a second buffer and a DC/AC prediction circuit is disclosed. The variable length decoding circuit decodes a first block and a second block from a compressed media stream. The first and second buffers are electrically coupled with the variable-length decoding circuit to store the first block and the second blocks, respectively. The DC/AC prediction circuit is electrically coupled with the first buffer and the second buffer. The DC/AC prediction circuit may read the first block from the first buffer when the second buffer is storing the second block.

Abstract: A memory address monitoring device for monitoring a memory includes an address determining module and an identification determining module. A first process has a first process identification and issues a request address to access the memory. The memory saves data of a second process between a beginning address and an ending address of the memory. The second process has a second process identification. In this device, the address determining module receives the request address and determines whether the request address is located between the beginning address and the ending address to generate an address determining result. The identification determining module receives the address determining result, the first process identification and the second process identification, and compares the first process identification with the second process identification to generate an identification determining result when the address determining result is true.

Abstract: A decoding device includes a variable-length decoding circuit, a first buffer, a second buffer and a DC/AC prediction circuit is disclosed. The variable length decoding circuit decodes a first block and a second block from a compressed media stream. The first and second buffers are electrically coupled with the variable-length decoding circuit to store the first block and the second blocks, respectively. The DC/AC prediction circuit is electrically coupled with the first buffer and the second buffer. The DC/AC prediction circuit may read the first block from the first buffer when the second buffer is storing the second block.