Patents by Inventor Amar Ashok Mavinkurve

Amar Ashok Mavinkurve has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230393192
    Abstract: A device comprises a substrate and a stacked bond ball structure. The substrate comprises a bond pad, and the stacked bond ball structure comprises a first and a second bond ball. The first bond ball is in contact with the bond pad, and the second bond ball is positioned on the first bond ball. The stacked bond ball structure is configured to be coupled to a resistance-sensing circuit, such that a resistance of an interface between the first bond ball and the bond pad can be measured to determine an amount of degradation of the interface between the first bond ball and the bond pad. In some implementations, the device further comprises a controller configured to obtain a measured resistance of the interface from the resistance-sensing circuit and determine the amount of degradation of the interface based at least in part on the measured resistance.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 7, 2023
    Inventors: Michiel van Soestbergen, Amar Ashok Mavinkurve
  • Publication number: 20220263222
    Abstract: A semiconductor device comprising a substrate, a first integrated circuit package mounted on the substrate, the first integrated circuit package comprising a first antenna sub-array having a uniform pitch, and a second integrated circuit package mounted on the substrate, the second integrated circuit package comprising a second antenna sub-array having a uniform pitch. The second integrated circuit package is mounted adjacent to the first integrated circuit package to form a multi-package module having an antenna array formed of the first antenna sub-array and the second antenna sub-array, wherein the antenna array has a uniform pitch. Also provided is a method of manufacturing a multi-package module and a method of providing package-to-package grounding.
    Type: Application
    Filed: February 2, 2022
    Publication date: August 18, 2022
    Inventors: Antonius Hendrikus Jozef Kamphuis, Jan Willem Bergman, Marcellinus Johannes Maria Geurts, Mustafa Acar, Paul Mattheijssen, Rajesh Mandamparambil, Andrei-Alexandru Damian, Amar Ashok Mavinkurve
  • Patent number: 10643957
    Abstract: Embodiments of packaged semiconductor devices and methods of making thereof are provided herein, which include a semiconductor die having a plurality of pads on an active side; a dummy die having a plurality of openings that extend from a first major surface to a second major surface opposite the first major surface, wherein the plurality of openings are aligned with the plurality of pads; and a silicone-based glue attaching the dummy die to the active side of the semiconductor die, wherein a plurality of bondable surfaces of the semiconductor die are exposed through the plurality of openings of the dummy die.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: May 5, 2020
    Assignee: NXP B.V.
    Inventors: Antonius Hendrikus Jozef Kamphuis, Amar Ashok Mavinkurve, Jetse De Witte, Andrei-Alexandru Damian
  • Patent number: 10593635
    Abstract: Embodiments are provided for a multi-die packaged semiconductor device including: a panel of embedded dies including a plurality of radio frequency (RF) dies, wherein each RF die includes RF front-end circuitry, each RF die has an active side that includes a plurality of pads, each RF die has a back side exposed in a back side of the panel; a plurality of antenna connectors formed on a subset of the plurality of pads of each RF die; and an array of antennas formed over a front side of the panel and connected to the plurality of antenna connectors.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: March 17, 2020
    Assignee: NXP B.V.
    Inventors: Antonius Hendrikus Jozef Kamphuis, Paul Southworth, Keith Richard Sarault, Marcellinus Johannes Maria Geurts, Jeroen Johannes Maria Zaal, Johannes Henricus Johanna Janssen, Amar Ashok Mavinkurve
  • Publication number: 20200066653
    Abstract: Embodiments of packaged semiconductor devices and methods of making thereof are provided herein, which include a semiconductor die having a plurality of pads on an active side; a dummy die having a plurality of openings that extend from a first major surface to a second major surface opposite the first major surface, wherein the plurality of openings are aligned with the plurality of pads; and a silicone-based glue attaching the dummy die to the active side of the semiconductor die, wherein a plurality of bondable surfaces of the semiconductor die are exposed through the plurality of openings of the dummy die.
    Type: Application
    Filed: August 27, 2018
    Publication date: February 27, 2020
    Inventors: Antonius Hendrikus Jozef KAMPHUIS, Amar Ashok MAVINKURVE, Jetse DE WITTE, Andrei-Alexandru DAMIAN
  • Publication number: 20190304934
    Abstract: Embodiments are provided for a multi-die packaged semiconductor device including: a panel of embedded dies including a plurality of radio frequency (RF) dies, wherein each RF die includes RF front-end circuitry, each RF die has an active side that includes a plurality of pads, each RF die has a back side exposed in a back side of the panel; a plurality of antenna connectors formed on a subset of the plurality of pads of each RF die; and an array of antennas formed over a front side of the panel and connected to the plurality of antenna connectors.
    Type: Application
    Filed: March 27, 2018
    Publication date: October 3, 2019
    Inventors: Antonius Hendrikus Jozef KAMPHUIS, Paul SOUTHWORTH, Keith Richard SARAULT, Marcellinus Johannes Maria GEURTS, Jeroen Johannes Maria ZAAL, Johannes Henricus Johanna JANSSEN, Amar Ashok MAVINKURVE
  • Patent number: 10431575
    Abstract: Embodiments are provided that include a method for fabricating a multi-die package including: placing a plurality of flip chip dies and splitter dies on the sacrificial carrier; performing solder reflow to join solder bumps of each flip chip die and each splitter die to the sacrificial carrier that includes test probe circuitry; testing the flip chip and splitter dies; replacing any faulty dies; overmolding the flip chip and splitter dies on the sacrificial carrier to form a panel of embedded dies; planarizing the panel of embedded dies to expose back surfaces of the embedded dies; forming a metallization layer across the back surface of the panel of embedded dies; and removing the sacrificial carrier to expose a front surface of the panel of embedded dies, wherein a contact surface of each solder bump of each flip chip die and splitter die is exposed in the front surface.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: October 1, 2019
    Assignee: NXP B.V.
    Inventors: Antonius Hendrikus Jozef Kamphuis, Jeroen Johannes Maria Zaal, Johannes Henricus Johanna Janssen, Amar Ashok Mavinkurve
  • Publication number: 20190189606
    Abstract: Embodiments are provided that include a method for fabricating a multi-die package including: placing a plurality of flip chip dies and splitter dies on the sacrificial carrier; performing solder reflow to join solder bumps of each flip chip die and each splitter die to the sacrificial carrier that includes test probe circuitry; testing the flip chip and splitter dies; replacing any faulty dies; overmolding the flip chip and splitter dies on the sacrificial carrier to form a panel of embedded dies; planarizing the panel of embedded dies to expose back surfaces of the embedded dies; forming a metallization layer across the back surface of the panel of embedded dies; and removing the sacrificial carrier to expose a front surface of the panel of embedded dies, wherein a contact surface of each solder bump of each flip chip die and splitter die is exposed in the front surface.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 20, 2019
    Inventors: Antonius Hendrikus Jozef KAMPHUIS, Jeroen Johannes Maria ZAAL, Johannes Henricus Johanna JANSSEN, Amar Ashok MAVINKURVE
  • Patent number: 9461005
    Abstract: An RF package including: an RF circuit; a non-gaseous dielectric material coupled to the RF circuit, and having a thickness based on a magnetic field in the RF circuit; and an encapsulant material coupled to cover the RF circuit and non-gaseous dielectric material on at least one side of the RF circuit. A package manufacturing method, including: identifying an RF circuit; dispensing a non-gaseous dielectric material upon the RF circuit, wherein at least a portion of the non-gaseous dielectric material has a thickness based on a magnetic field in the RF circuit; and covering the RF circuit and non-gaseous dielectric material with an encapsulant material on at least one side of the RF circuit.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: October 4, 2016
    Assignee: Ampleon Netherlands B.V.
    Inventors: Christian Weinschenk, Amar Ashok Mavinkurve
  • Publication number: 20160240491
    Abstract: An RF package including: an RF circuit; a non-gaseous dielectric material coupled to the RF circuit, and having a thickness based on a magnetic field in the RF circuit; and an encapsulant material coupled to cover the RF circuit and non-gaseous dielectric material on at least one side of the RF circuit. A package manufacturing method, including: identifying an RF circuit; dispensing a non-gaseous dielectric material upon the RF circuit, wherein at least a portion of the non-gaseous dielectric material has a thickness based on a magnetic field in the RF circuit; and covering the RF circuit and non-gaseous dielectric material with an encapsulant material on at least one side of the RF circuit.
    Type: Application
    Filed: February 12, 2015
    Publication date: August 18, 2016
    Inventors: Christian Weinschenk, Amar Ashok Mavinkurve
  • Patent number: 7815691
    Abstract: The invention relates to a compound to improve wrinkle resistance in fabrics, comprising: a wrinkle reducing agent, comprising at least one fusible elastomer, and a liquid carrier for carrying said agent and a salt composition for physical crosslinking said fusible elastomer. The invention also relates to a fabric provided with said wrinkle resistance improving compound. The invention further relates to a method of improving wrinkle resistance in a fabric by use of such a compound.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: October 19, 2010
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Amar Ashok Mavinkurve, Sima Asvadi, Eduard Josephus Hultermans, Paul Anton Josef Ackermans, Rifat Ata Mustafa Hikmet, Wilma Van Es-Spiekman
  • Patent number: 7040045
    Abstract: The invention relates to an iron having means for moistening fabric to be ironed. According to the invention, the moistening means comprise a device for generating foam and means for applying said generated foam to the fabric. For example, foam may be generated by means of a nozzle (21) having a first inlet (8) for a foaming liquid (6) and a second inlet (12) for supplying pressurized air to the nozzle so as to mix air with said liquid, thereby creating foam (42). Applying foam to the fabric (50) can be realized by means of a doctor blade (51) to break up the foam.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: May 9, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Amar Ashok Mavinkurve, Eduard Josephus Hultermans, Petrus Henricus De Leeuw, Nyik Siong Wong, Asok Kumar SO Kasevan