Patents by Inventor Amaresh Virupanagouda Malipatil

Amaresh Virupanagouda Malipatil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8848774
    Abstract: A method and system of adaptation of a linear equalizer using a virtual decision feedback equalizer (VDFE) are disclosed. In one embodiment, a method of adjusting a setting of a linear equalizer includes determining a change to a decision feedback equalizer (DFE) tap weight value of a predefined metric according to a data signal and an error signal (e.g., the change may be generated according to an average of a specified plurality of data signals and the error signal); using the change in the DFE tap weight value to algorithmically generate a modification in a linear equalizer setting; and adjusting the linear equalizer setting. The linear equalizer is located in a feed-forward path and/or a feedback path of data transmission. The linear equalizer may be located in a transmitter and/or a receiver. The linear equalizer may be a continuous time linear equalizer and/or a Finite Impulse Response (FIR) linear equalizer.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: September 30, 2014
    Assignee: LSI Corporation
    Inventors: Lizhi Zhong, Cathy Ye Liu, Amaresh Virupanagouda Malipatil, Freeman Zhong
  • Publication number: 20100046598
    Abstract: A method and system of adaptation of a linear equalizer using a virtual decision feedback equalizer (VDFE) are disclosed. In one embodiment, a method of adjusting a setting of a linear equalizer includes determining a change to a decision feedback equalizer (DFE) tap weight value of a predefined metric according to a data signal and an error signal (e.g., the change may be generated according to an average of a specified plurality of data signals and the error signal); using the change in the DFE tap weight value to algorithmically generate a modification in a linear equalizer setting; and adjusting the linear equalizer setting. The linear equalizer is located in a feed-forward path and/or a feedback path of data transmission. The linear equalizer may be located in a transmitter and/or a receiver. The linear equalizer may be a continuous time linear equalizer and/or a Finite Impulse Response (FIR) linear equalizer.
    Type: Application
    Filed: August 19, 2008
    Publication date: February 25, 2010
    Inventors: LIZHI ZHONG, Cathy Ye Liu, Amaresh Virupanagouda Malipatil, Freeman Zhong