Patents by Inventor Ambalametil Narayanan Naveen

Ambalametil Narayanan Naveen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11625246
    Abstract: Methods, apparatus, and systems to replace values in a device are disclosed. An example apparatus includes a processor and a replacement generator coupled to the processor and configured to detect an access, by the processor, of a first instruction at a first address in a first memory, in response to the detected access, compare the first address to a set of trigger instruction address records in a second memory, wherein the set of trigger instruction address records includes a first trigger instruction address record that is associated with a first replacement address record and a first replacement value record, and based on the first address corresponding to the first trigger instruction address record, replace a first value at a second address in a third memory specified by the first replacement address record with a second value specified by the first replacement value record.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: April 11, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Ambalametil Narayanan Naveen, Jasbir Singh
  • Publication number: 20210373894
    Abstract: Methods, apparatus, and systems to replace values in a device are disclosed. An example apparatus includes a processor and a replacement generator coupled to the processor and configured to detect an access, by the processor, of a first instruction at a first address in a first memory, in response to the detected access, compare the first address to a set of trigger instruction address records in a second memory, wherein the set of trigger instruction address records includes a first trigger instruction address record that is associated with a first replacement address record and a first replacement value record, and based on the first address corresponding to the first trigger instruction address record, replace a first value at a second address in a third memory specified by the first replacement address record with a second value specified by the first replacement value record.
    Type: Application
    Filed: August 12, 2021
    Publication date: December 2, 2021
    Inventors: Ambalametil Narayanan Naveen, Jasbir Singh
  • Patent number: 11119775
    Abstract: Methods, apparatus, and systems to replace values in a device are disclosed. An example apparatus includes a processor and a replacement generator coupled to the processor and configured to detect an access, by the processor, of a first instruction at a first address in a first memory, in response to the detected access, compare the first address to a set of trigger instruction address records in a second memory, wherein the set of trigger instruction address records includes a first trigger instruction address record that is associated with a first replacement address record and a first replacement value record, and based on the first address corresponding to the first trigger instruction address record, replace a first value at a second address in a third memory specified by the first replacement address record with a second value specified by the first replacement value record.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: September 14, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ambalametil Narayanan Naveen, Jasbir Singh
  • Publication number: 20210200544
    Abstract: Methods, apparatus, and systems to replace values in a device are disclosed. An example apparatus includes a processor and a replacement generator coupled to the processor and configured to detect an access, by the processor, of a first instruction at a first address in a first memory, in response to the detected access, compare the first address to a set of trigger instruction address records in a second memory, wherein the set of trigger instruction address records includes a first trigger instruction address record that is associated with a first replacement address record and a first replacement value record, and based on the first address corresponding to the first trigger instruction address record, replace a first value at a second address in a third memory specified by the first replacement address record with a second value specified by the first replacement value record.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 1, 2021
    Inventors: Ambalametil Narayanan Naveen, Jasbir Singh