Patents by Inventor Amber D. Huffman

Amber D. Huffman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180088978
    Abstract: Examples include techniques for input/output (I/O) access to physical memory or storage by a virtual machine (VM) or a container. Example techniques include use of a queue pair maintained at a controller for I/O access to the physical memory or storage. The queue pair including a submission queue and a completion queue. An assignment of a process address space identifier (PASID) to the queue pair facilitates I/O access to the physical memory or storage for a given VM or container.
    Type: Application
    Filed: September 29, 2016
    Publication date: March 29, 2018
    Applicant: Intel Corporation
    Inventors: Yadong Li, David Noeldner, Bryan E. Veal, Amber D. Huffman, Frank T. Hady
  • Patent number: 9317212
    Abstract: A mass storage device such as a disk drive or SSD (solid state drive) employs optimization logic for reduced power consumption in a host personal electronic device that identifies and prioritizes performance and power trade-offs by considering user expectations, user presence and application responsiveness. The storage device receives commands and information from the host device indicative of user expectations about application invocation, data freshness, and usage patterns, and determines a operational state indicative of behavior settings for reducing power consumption while maintaining the performance constraints required by the user expectations. The granularity of performance considerations communicated from the host device to the mass storage device is expanded to permit the storage device to determine, based on performance constraints from user expectations, appropriate and specific power reduction measures for maintaining the user experience.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: April 19, 2016
    Assignee: Intel Corporation
    Inventors: Amber D. Huffman, Knut S. Grimsrud, Thomas J. Barnes
  • Patent number: 9053014
    Abstract: A system and method of controlling a flash memory device such as a NAND memory device may involve receiving a command to execute an operation. A Ready/Busy contact of the memory device may be pulsed low in response to determining that execution of the operation has completed.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: June 9, 2015
    Assignee: Intel Corporation
    Inventors: Amber D. Huffman, Suryaprasad Kareenahalli, Robert J. Royer, Jr., Chai Huat Gan
  • Patent number: 8935458
    Abstract: Systems and methods of managing computing system restore points may include an apparatus having logic to receive a command to start a restore point for a solid state drive (SSD). The logic may also conduct a context drop of an indirection table from a volatile memory of the SSD to a non-volatile memory of the SSD in response to the command to start the restore point.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: January 13, 2015
    Assignee: Intel Corporation
    Inventors: Robert J. Royer, Jr., Amber D. Huffman
  • Publication number: 20140173242
    Abstract: A mass storage device such as a disk drive or SSD (solid state drive) employs optimization logic for reduced power consumption in a host personal electronic device that identifies and prioritizes performance and power trade-offs by considering user expectations, user presence and application responsiveness. The storage device receives commands and information from the host device indicative of user expectations about application invocation, data freshness, and usage patterns, and determines a operational state indicative of behavior settings for reducing power consumption while maintaining the performance constraints required by the user expectations. The granularity of performance considerations communicated from the host device to the mass storage device is expanded to permit the storage device to determine, based on performance constraints from user expectations, appropriate and specific power reduction measures for maintaining the user experience.
    Type: Application
    Filed: December 18, 2012
    Publication date: June 19, 2014
    Inventors: Amber D. Huffman, Knut S. Grimsrud, Thomas J. Barnes
  • Publication number: 20140019676
    Abstract: A system and method of controlling a flash memory device such as a NAND memory device may involve receiving a command to execute an operation. A Ready/Busy contact of the memory device may be pulsed low in response to determining that execution of the operation has completed.
    Type: Application
    Filed: September 12, 2013
    Publication date: January 16, 2014
    Inventors: Amber D. Huffman, Suryaprasad Kareenahalli, Robert J. Royer, JR., Chai Huat Gan
  • Patent number: 8560764
    Abstract: A system and method of controlling a flash memory device such as a NAND memory device may involve receiving a command to execute an operation. A Ready/Busy contact of the memory device may be pulsed low in response to determining that execution of the operation has completed.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: October 15, 2013
    Assignee: Intel Corporation
    Inventors: Amber D. Huffman, Suryaprasad Kareenahalli, Robert J. Rover, Jr., Chai Huat Gan
  • Patent number: 8464084
    Abstract: A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: June 11, 2013
    Assignee: Intel Corporation
    Inventors: Amber D. Huffman, Eng Hun Ooi
  • Publication number: 20120173794
    Abstract: Systems and methods of managing computing system restore points may include an apparatus having logic to receive a command to start a restore point for a solid state drive (SSD). The logic may also conduct a context drop of an indirection table from a volatile memory of the SSD to a non-volatile memory of the SSD in response to the command to start the restore point.
    Type: Application
    Filed: January 5, 2011
    Publication date: July 5, 2012
    Inventors: Robert J. Royer, JR., Amber D. Huffman
  • Publication number: 20120173903
    Abstract: A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process.
    Type: Application
    Filed: November 1, 2011
    Publication date: July 5, 2012
    Inventors: Amber D. Huffman, Eng Hun Ooi
  • Patent number: 8171219
    Abstract: A method and system to perform caching based at least on one or more file-level heuristics. The caching of a storage medium in a caching device is performed by a cache policy engine. The cache policy engine receives file-level information of input/output access of data of the storage medium and caches or evicts the data of the storage medium in the caching device based on the received file-level information. By utilizing information about the files and file operations associated with the disk sectors or logical block addresses of the storage medium, the cache policy engine can make a better decision on the data selection of the storage medium to be cached in or evicted from the caching device in one embodiment of the invention. Higher cache hit rates can be achieved and the performance of the system utilizing the cache policy engine is improved.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: May 1, 2012
    Assignee: Intel Corporation
    Inventors: Sanjeev N. Trika, Amber D. Huffman, James A. Boyd, Frank T. Hady, Glenn J. Hinton, Dale J. Juenemann, Oscar P. Pinto, Scott R. Tetrick, Thomas J. Barnes, Scott E. Burridge
  • Patent number: 8051232
    Abstract: Methods and apparatuses for identifying types of data streams and communicating stream information to improve performance of data storage devices are disclosed. Method embodiments generally comprise identifying one or more isochronous requests among a plurality of requests which may be issued to a data storage device, assigning a completion deadline an isochronous request, and communicating the isochronous request and completion deadline information to the data storage device. Apparatus embodiments generally comprise a request identifier to identify an isochronous request, a logic module to assign a completion deadline to the isochronous request, and a communication module to communicate the isochronous request and the completion deadline to a data storage device. Alternative apparatus embodiments may include a monitor module to monitor a system process operating in the system and determine if the system process issues isochronous requests.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: November 1, 2011
    Assignee: Intel Corporation
    Inventors: Brian M Dees, Amber D. Huffman, R. Scott Tetrick
  • Patent number: 8051314
    Abstract: A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: November 1, 2011
    Assignee: Intel Corporation
    Inventors: Amber D. Huffman, Eng Hun Ooi
  • Publication number: 20110153914
    Abstract: A system and method of controlling a flash memory device such as a NAND memory device may involve receiving a command to execute an operation. A Ready/Busy contact of the memory device may be pulsed low in response to determining that execution of the operation has completed.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 23, 2011
    Inventors: Amber D. Huffman, Suryaprasad Kareenahalli, Robert J. Royer, JR., Chai Huat Gan
  • Publication number: 20100250834
    Abstract: A method and system to perform caching based at least on one or more file-level heuristics. The caching of a storage medium in a caching device is performed by a cache policy engine. The cache policy engine receives file-level information of input/output access of data of the storage medium and caches or evicts the data of the storage medium in the caching device based on the received file-level information. By utilizing information about the files and file operations associated with the disk sectors or logical block addresses of the storage medium, the cache policy engine can make a better decision on the data selection of the storage medium to be cached in or evicted from the caching device in one embodiment of the invention. Higher cache hit rates can be achieved and the performance of the system utilizing the cache policy engine is improved.
    Type: Application
    Filed: March 31, 2009
    Publication date: September 30, 2010
    Inventors: Sanjeev N. Trika, Amber D. Huffman, James A. Boyd, Frank T. Hady, Glenn J. Hinton, Dale J. Juenemann, Oscar P. Pinto, Scott R. Tetrick, Thomas J. Barnes, Scott E. Burridge
  • Patent number: 7694026
    Abstract: Methods and arrangements to handle non-queued commands for data storage devices, such as Parallel and Serial ATA hard drives, are disclosed. Embodiments may comprise a host and/or a data storage device. The host and data storage device may form, e.g., a handheld device such as an MP3 player, a cellular phone, or the like. The storage device may comprise a new method of responding to a non-queued command while the storage device may be processing a queue of commands. In many embodiments, the method involves processing queued commands until the drive receives a non-queued command that requires immediate processing by the drive. In many of these embodiments, the drive will respond in a new manner to process the non-queued command, the end result having no or minimal impact on host system operation.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: April 6, 2010
    Assignee: Intel Corporation
    Inventor: Amber D. Huffman
  • Patent number: 7661054
    Abstract: Methods and arrangements to remap degraded storage blocks on, e.g., IDE/ATA drives are disclosed. Embodiments may comprise a host and/or a data storage device for, e.g., a handheld device. The host may comprise remapping logic. In many embodiments, the remapping logic may track degraded storage blocks as indicated by the data storage device. In several embodiments, the host may remap data from degraded storage blocks in response to indications from the data storage device that the degraded storage blocks have degraded to a point at which further use may risk loss of data. The data storage device may execute error correction code to acquire valid data and if error correction measures exceed a threshold, or are otherwise determined to be excessive, the data storage device may communicate the degradation of the storage block to the host. Other embodiments may be disclosed and claimed.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: February 9, 2010
    Assignee: Intel Corporation
    Inventors: Amber D. Huffman, Knut S. Grimsrud
  • Publication number: 20090327773
    Abstract: A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process.
    Type: Application
    Filed: June 25, 2008
    Publication date: December 31, 2009
    Inventors: Amber D. Huffman, Eng Hun Ooi
  • Publication number: 20090164719
    Abstract: In some embodiments, disk accesses made during normal operation of a disk drive are monitored. One or more data blocks on the disk drive are identified as candidates for replication on the disk drive in response to the monitoring. Each of the identified data blocks are replicated in at least one other place on the disk drive. Other embodiments are described and claimed.
    Type: Application
    Filed: February 25, 2009
    Publication date: June 25, 2009
    Inventors: Knut S. Grimsrud, Amber D. Huffman
  • Patent number: 7515528
    Abstract: A method and apparatus for detecting a presence of a fail over switch is described. In one embodiment, during an Serial ATA sequence initialization handshake, a host transmits a COMRESET to a device. In return, the host receives a COMWAKE from the device. If the host is of a first type of host, then the host identifies a presence of a fail over switch, in response to receipt of the COMWAKE. If the host is of a second type of host, then the host ignores the COMWAKE. The host then receives a COMINIT from the device, in accordance with the Serial ATA sequence handshake. The host transmits a COMWAKE to the device, and the host receives a COMWAKE in return from the device.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: April 7, 2009
    Assignee: Intel Corporation
    Inventors: Knut S. Grimsrud, Amber D. Huffman