Abstract: A computer-implemented method for message handling between a receiver and a sender of a throttling system is provided. The computer-implemented method includes receiving a first message that includes a completion queue element by the receiver from the sender. The computer-implemented method includes detecting that a number of outstanding completion queue elements in a completion queue meets or exceeds a high mark and instructing the sender to enter a throttle mode. The computer-implemented method includes receiving a second message without a completion queue element by the receiver from the sender. The computer-implemented method includes detecting that the number of the outstanding completion queue elements in the completion queue meets or is below a low mark and instructing the sender to exit the throttle mode.

Abstract: A computer-implemented method for message handling between a receiver and a sender of a throttling system is provided. The computer-implemented method includes receiving a first message that includes a completion queue element by the receiver from the sender. The computer-implemented method includes detecting that a number of outstanding completion queue elements in a completion queue meets or exceeds a high mark and instructing the sender to enter a throttle mode. The computer-implemented method includes receiving a second message without a completion queue element by the receiver from the sender. The computer-implemented method includes detecting that the number of the outstanding completion queue elements in the completion queue meets or is below a low mark and instructing the sender to exit the throttle mode.

Abstract: Embodiments relate to path selection for packet transfer in a network. An aspect includes a method of selecting a path among a plurality of paths in a network for transfer of a packet from a first system to a second system in the network. The method includes storing, in a memory device, a static path performance vector indicating a tier among a plurality of tiers corresponding with each of the plurality of paths, each of the plurality of tiers corresponding with a relative performance level. The method also includes maintaining a path availability bit vector indicating an availability of each of the plurality of paths, and selecting, using a processor, the path among the plurality of paths based on the path performance vector and the path availability bit vector.

Abstract: Embodiments relate to path selection for packet transfer in a network. An aspect includes a method of selecting a path among a plurality of paths in a network for transfer of a packet from a first system to a second system in the network. The method includes storing, in a memory device, a static path performance vector indicating a tier among a plurality of tiers corresponding with each of the plurality of paths, each of the plurality of tiers corresponding with a relative performance level. The method also includes maintaining a path availability bit vector indicating an availability of each of the plurality of paths, and selecting, using a processor, the path among the plurality of paths based on the path performance vector and the path availability bit vector.

Abstract: Embodiments relate to path selection for packet transfer in a network. An aspect includes a method of selecting a path among a plurality of paths in a network for transfer of a packet from a first system to a second system in the network. The method includes storing, in a memory device, a static path performance vector indicating a tier among a plurality of tiers corresponding with each of the plurality of paths, each of the plurality of tiers corresponding with a relative performance level. The method also includes maintaining a path availability bit vector indicating an availability of each of the plurality of paths, and selecting, using a processor, the path among the plurality of paths based on the path performance vector and the path availability bit vector.

Abstract: Embodiments relate to path selection for packet transfer in a network. An aspect includes a method of selecting a path among a plurality of paths in a network for transfer of a packet from a first system to a second system in the network. The method includes storing, in a memory device, a static path performance vector indicating a tier among a plurality of tiers corresponding with each of the plurality of paths, each of the plurality of tiers corresponding with a relative performance level. The method also includes maintaining a path availability bit vector indicating an availability of each of the plurality of paths, and selecting, using a processor, the path among the plurality of paths based on the path performance vector and the path availability bit vector.

Abstract: Embodiments relate to path selection for packet transfer in a network. An aspect includes a method of selecting a path among a plurality of paths in a network for transfer of a packet from a first system to a second system in the network. The method includes storing, in a memory device, a static path performance vector indicating a tier among a plurality of tiers corresponding with each of the plurality of paths, each of the plurality of tiers corresponding with a relative performance level. The method also includes maintaining a path availability bit vector indicating an availability of each of the plurality of paths, and selecting, using a processor, the path among the plurality of paths based on the path performance vector and the path availability bit vector.

Abstract: Embodiments relate to path selection for packet transfer in a network. An aspect includes a method of selecting a path among a plurality of paths in a network for transfer of a packet from a first system to a second system in the network. The method includes storing, in a memory device, a static path performance vector indicating a tier among a plurality of tiers corresponding with each of the plurality of paths, each of the plurality of tiers corresponding with a relative performance level. The method also includes maintaining a path availability bit vector indicating an availability of each of the plurality of paths, and selecting, using a processor, the path among the plurality of paths based on the path performance vector and the path availability bit vector.

Abstract: A computer program product, apparatus and method for emulating channels in a multi-tasking multi-processor environment, including identifying a plurality of physical channels having an associated physical channel identifier for each of the plurality of physical channels, associating an emulated channel from a plurality of emulated channels for each of the plurality of physical channels, thereby generating a plurality of emulated channels, each of the plurality of emulated channels having a virtual channel identifier, mapping the plurality of emulated channels on a communications link, thereby generating an emulated channel path for each of the plurality of emulated channels, defining a queue pair link buffer from a plurality of queue pair link buffers for each of the emulated channels and increasing a number of queue pair link buffers.

Abstract: A computer program product for passing initiative in a multitasking multiprocessor environment includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes writing a request to process a resource of the environment to an associated resource control block, setting a resource flag in a central bit vector, the resource flag indicating that a request for processing has been received for the resource, and setting a target processor initiative flag in the environment, the target processor initiative flag indicating a pass of initiative to a target processor responsible for the resource.

Abstract: A computer program product for incorporating state machine controls into existing non-state machine environments includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes determining a state machine representation for an existing environment, assigning state indicators to each state of the state machine, transcoding existing software flags of the environment into modifier values associated with the state indicators, assigning state values based on the modifier values and the state indicators, assigning event identifiers for transitions from the state values, and creating a tabular representation of the determined state machine, the tabular representation providing next state information based on the event identifiers and the state values.

Abstract: A computer program product, apparatus and method for emulating channels in a multi-tasking multi-processor environment, including identifying a plurality of physical channels having an associated physical channel identifier for each of the plurality of physical channels, associating an emulated channel from a plurality of emulated channels for each of the plurality of physical channels, thereby generating a plurality of emulated channels, each of the plurality of emulated channels having a virtual channel identifier, mapping the plurality of emulated channels on a communications link, thereby generating an emulated channel path for each of the plurality of emulated channels, defining a queue pair link buffer from a plurality of queue pair link buffers for each of the emulated channels and increasing a number of queue pair link buffers.

Abstract: A computer program product for passing initiative in a multitasking multiprocessor environment includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes writing a request to process a resource of the environment to an associated resource control block, setting a resource flag in a central bit vector, the resource flag indicating that a request for processing has been received for the resource, and setting a target processor initiative flag in the environment, the target processor initiative flag indicating a pass of initiative to a target processor responsible for the resource.

Abstract: A computer program product for incorporating state machine controls into existing non-state machine environments includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes determining a state machine representation for an existing environment, assigning state indicators to each state of the state machine, transcoding existing software flags of the environment into modifier values associated with the state indicators, assigning state values based on the modifier values and the state indicators, assigning event identifiers for transitions from the state values, and creating a tabular representation of the determined state machine, the tabular representation providing next state information based on the event identifiers and the state values.

Abstract: A computer program product, apparatus and method for buffer discovery in a multi-tasking multi-processor environment. An exemplary embodiment includes establishing a management connection, confirming that end points of the management connection are connected to respective targets, sending a negotiate counts message, including a number and size of buffers associated with parameters of the management connection and receiving a response to the negotiate counts message, the response including at least one of rejection of the management connection and an acceptance of the management connection, including an agreed number and size of the buffers.

Abstract: Method and apparatus for sending data from one partition to a second partition within a logically partitioned computer. In a data processing system having multiple logical partitions, a send queue is established in the first logical partition, and a receive queue is established in the second logical partition. The send queue is registered in the send queue in a lookup table available to all of the logical partitions. The send queue is registered using as a key the logical partition identification of the first logical partition and the subchannel number (LPAR-ID.SUBCHANNEL#) of the subchannel assigned to the partition. The receive queue is registered in the lookup table using as a key, the internet protocol address of the receive queue in the second partition. A send instruction from the first logical partition is executed which interrogates the lookup table using the LPAR-ID.

Abstract: A method and apparatus that provide connectivity in a computer network environment that includes a plurality of nodes, interface links and at least one central electronic complex divided into one or more physical and or virtual sub-environments. A first control program is provided in the central electronic complex in order to establish a first command process layer and a first transfer process layer within this first control program for handling data. The first command process layer is then linked to the first transfer process layer in this control program. A second control program is also provided in the central electronic complex in order to establish a second command process layer and a second transfer process layer within this second control program for handling data. The second command process layer is also linked to the second transfer layer in said second control program.

Abstract: A computer system with a coupling facility is provided with a plurality of processors and a plurality of intersystem channels coupled to the processors via a memory bus. The coupling facility includes a memory bus interface for the memory bus and a plurality of channels for coupling said channels to said processors. The memory bus interface includes an adapter with at least two hardware vectors provided for command detection, command isolation, and parallel testing of the error states of the intersystem channels, one which detects a command vector arrival, and a second which contains error state vector indicators. A LOCATE CHANNEL BUFFER (LCB) instruction is employed which performs a sense and reset operation on the command vector to identify and isolate a new command, and subsequently reads a vector of said error states vector indicator to determine the presence or absence of link errors.

Abstract: Method and apparatus for creating and accessing data objects stored in a portion of the main memory of a data processing system which is inaccessible to programs. The data processing system includes a central processor for executing programs for processing data and a main memory for storing data and programs. The main memory is divided into a program accessible portion and a program inaccessible portion. Vector control objects and vector entries are stored in the program inaccessible portion of the main memory, with each vector entry having states the meaning of which are program defined. Tokens are generated to locate vector control objects in the program inaccessible portion of the main memory. Each vector control object includes a field for pointing to a vector entry for accessing and making observable to the central processor, the contents of a vector entry for indicating the status therein.