Patents by Inventor Ami MA

Ami MA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240402619
    Abstract: An apparatus for predicting a structure of a semiconductor device, the apparatus includes: at least one processor; a storage configured to store a learned model configured to predict the structure of the semiconductor device; and a memory configured to store at least one code, and at least one processor operatively connected to the memory and configured to execute the at least one code to: input non-destructive metrology data measured from the semiconductor device into the learned model, and predict the structure of the semiconductor device, based on the learned model, wherein the learned model is trained with training data including first data which is non-destructive metrology data and second data which is structural metrology data as reference data of the first data, and wherein the training data is refined based on a similarity of the training data in a space having a first axis corresponding to the first data and a second axis corresponding to the second data as reference axes.
    Type: Application
    Filed: January 4, 2024
    Publication date: December 5, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Minkyu KIM, QHwan KIM, Ami MA, Sunghee LEE, Kyu-Baik CHANG, Jaehoon JEONG, Wanju CHO, Hanlim CHOI
  • Publication number: 20240211755
    Abstract: Provided are a method of providing an artificial intelligence (AI) algorithm, an operation method of an AI algorithm, an electronic device, a recording medium, and a computer program. The method of providing the AI algorithm includes loading data sets with respect to a spectrum of a semiconductor and a structure of the semiconductor, calculating an out of distribution (OOD) index with respect to the spectrum of the semiconductor, performing data split by clustering sampling the data sets into at least one learning data set with respect to OOD indexes according to semiconductors, and providing an optimal AI algorithm from among a plurality of AI algorithms that have learned the at least one learning data set.
    Type: Application
    Filed: August 22, 2023
    Publication date: June 27, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sunghee LEE, QHwan KIM, Minkyu KIM, Bongseok KIM, Youngseok KIM, Ami MA, Jinkook PARK, Kyubaik CHANG, Jaehoon JEONG
  • Publication number: 20240028814
    Abstract: A method for measuring a structure based on a spectrum, includes obtaining a first model that includes a first sub-model and a second sub-model following the first sub-model and is trained based on simulation data, generating a second model including a third sub-model identical to the first sub-model, training the second model based on sample spectrum data generated by measuring spectra of sample structures, and estimating, based on the trained second model, the structure from measured spectrum data generated by measuring a spectrum of the structure.
    Type: Application
    Filed: July 7, 2023
    Publication date: January 25, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: QHwan KIM, Jaeyoon KIM, Hyeonkyun NOH, Ami MA, Sunghee LEE, Kyubaik CHANG, Wooyoung CHEON, Jaehoon JEONG
  • Patent number: 11741596
    Abstract: A semiconductor wafer fault analysis system includes: a database to store a first reference map, which is classified as a first fault type, and a second reference map, which is classified as a second fault type; a first auto-encoder/decoder to remove a noise corresponding to the first fault type from the first reference map to generate a first pre-processed reference map; a second auto-encoder/decoder to remove a noise corresponding to the second fault type from the second reference map to generate a second pre-processed reference map; and a fault type analyzer. The database is updated based on the first and second pre-processed reference maps, and the fault type analyzer is to classify a fault type of a target map based on the updated database. The target map is generated by measuring a target wafer.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: August 29, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-Chul Park, Ami Ma, Jisu Ryu, Changwook Jeong
  • Publication number: 20230062430
    Abstract: A device structure simulation apparatus includes a memory storing a device structure simulation program and a processor configured to execute the device structure simulation program stored in the memory. By executing the device structure simulation program, the device structure simulation apparatus is further configured to receive spectrum data of a target device, generate an input data set by performing preprocessing on the spectrum data, and train a model based on the input data set such that the model is configured to predict a structure of the target device. The preprocessing including selecting a certain basis function based on the spectrum data and separating the spectrum data into sets of certain basis functions, and the model includes at least one sub model.
    Type: Application
    Filed: August 18, 2022
    Publication date: March 2, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ami MA, Hyeonkyun NOH, Shinwook YI, Dongchul IHM, Kyubaik CHANG, Jaehoon JEONG
  • Publication number: 20200175665
    Abstract: A semiconductor wafer fault analysis system includes: a database to store a first reference map, which is classified as a first fault type, and a second reference map, which is classified as a second fault type; a first auto-encoder/decoder to remove a noise corresponding to the first fault type from the first reference map to generate a first pre-processed reference map; a second auto-encoder/decoder to remove a noise corresponding to the second fault type from the second reference map to generate a second pre-processed reference map; and a fault type analyzer. The database is updated based on the first and second pre-processed reference maps, and the fault type analyzer is to classify a fault type of a target map based on the updated database. The target map is generated by measuring a target wafer.
    Type: Application
    Filed: October 11, 2019
    Publication date: June 4, 2020
    Inventors: Min-Chul PARK, Ami MA, Jisu RYU, Changwook JEONG