Patents by Inventor Amiad Dvir

Amiad Dvir has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260149902
    Abstract: A terminal including a transceiver, an analog-to-digital converter and control circuitry. The transceiver receives a stream of bursts from a plurality of units. One of the units is an electronic device. The analog-to-digital converter receives an upstream burst from the transceiver during an active time slot. The upstream burst is one of the bursts. In response to sampling the upstream burst at a sample rate, the analog-to-digital converter converts the upstream burst from an analog waveform into a sequence of digital values. In response to a coefficient for the electronic device being a default coefficient, the control circuitry stores the digital values into memory during the active time slot.
    Type: Application
    Filed: November 27, 2024
    Publication date: May 28, 2026
    Inventors: Ryan Edgar Hirth, Amiad Dvir
  • Publication number: 20260149455
    Abstract: Methods and systems for adjusting phase lock loop devices. In a specific embodiment, the subject technology provides a system that includes a sampler for generating samples from a first data stream and a clock and data recovery (CDR) circuit to determine phase offset and generate a first control code. The system also includes a phase interpolator produces a first clock signal based on the first control code and a second clock signal. The system includes a first filter configured to track the phase interpolator movement, and it generates a second control code that includes a fractional divider value. The system includes a phase-locked loop (PLL) circuit that uses a reference clock to generate the second clock signal based on the third clock signal and the second control code. There are other embodiments as well.
    Type: Application
    Filed: November 25, 2024
    Publication date: May 28, 2026
    Inventors: Amiad Dvir, Gregory Alyn Unruh, Ryan Edgar Hirth, Da Xia, Xianwen Fang
  • Patent number: 12176907
    Abstract: A system for controlling jitter includes a first phase interpolator, a second phase interpolator, a first circuit configured to receive a first signal provided to the first phase interpolator, a second circuit configured to receive a second signal provided to the second phase interpolator, and a third circuit configured to provide a phase control signal in response to the first signal and the second signal. The first signal represents a first phase adjustment, and the second signal represents a second phase adjustment.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: December 24, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Amiad Dvir, Sourigno Outsama, Da Xia, Vitaly Zborovski
  • Publication number: 20240213988
    Abstract: A system for controlling jitter includes a first phase interpolator, a second phase interpolator, a first circuit configured to receive a first signal provided to the first phase interpolator, a second circuit configured to receive a second signal provided to the second phase interpolator, and a third circuit configured to provide a phase control signal in response to the first signal and the second signal. The first signal represents a first phase adjustment, and the second signal represents a second phase adjustment.
    Type: Application
    Filed: December 27, 2022
    Publication date: June 27, 2024
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Amiad DVIR, Sourigno OUTSAMA, Da XIA, Vitaly ZBOROVSKI
  • Patent number: 10313104
    Abstract: In some aspects, the disclosure is directed to methods and systems for controlling periodic jitter arising from a phase interpolator (PI). A receiver can receive incoming data. A fractional-N phase-locked loop (PLL) can receive a reference clock. Measurement circuitry can measure a parts per million (PPM) offset between the incoming data and the reference clock, of a PI. The fractional-N PLL can restrict jitter arising from the PI, to frequencies within a predefined bandwidth, by tuning a center frequency of the fractional-N PLL to reduce the PPM offset of the PI.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: June 4, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Amiad Dvir, Mike Rolfe Ferrara, Vitaly Zborovski, Mario Caresosa, Ryan Hirth, Assaf Naor
  • Patent number: 10305708
    Abstract: Methods, systems, and apparatuses are described for improving the signal integrity of a differential pair of signals by mitigating a non-balanced channel deficiency. For example, signal integrity may be improved by independently shaping and/or independently controlling the slopes (e.g., the rising edge and/or falling edge) of each signal of a differential pair of signals to counteract the effects caused by non-balanced deficiencies to provide a balanced differential pair of signals (i.e., signals having symmetrical impedances, loads, etc.).
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: May 28, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Shwetabh Verma, Bhaskar Banerjee, Amiad Dvir, Assaf Naor
  • Publication number: 20190089520
    Abstract: In some aspects, the disclosure is directed to methods and systems for controlling periodic jitter arising from a phase interpolator (PI). A receiver can receive incoming data. A fractional-N phase-locked loop (PLL) can receive a reference clock. Measurement circuitry can measure a parts per million (PPM) offset between the incoming data and the reference clock, of a PI. The fractional-N PLL can restrict jitter arising from the PI, to frequencies within a predefined bandwidth, by tuning a center frequency of the fractional-N PLL to reduce the PPM offset of the PI.
    Type: Application
    Filed: September 18, 2017
    Publication date: March 21, 2019
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Amiad Dvir, Mike Rolfe Ferrara, Vitaly Zborovski, Mario Caresosa, Ryan Hirth, Assaf Naor
  • Publication number: 20180331862
    Abstract: Methods, systems, and apparatuses are described for improving the signal integrity of a differential pair of signals by mitigating a non-balanced channel deficiency. For example, signal integrity may be improved by independently shaping and/or independently controlling the slopes (e.g., the rising edge and/or falling edge) of each signal of a differential pair of signals to counteract the effects caused by non-balanced deficiencies to provide a balanced differential pair of signals (i.e., signals having symmetrical impedances, loads, etc.).
    Type: Application
    Filed: July 20, 2018
    Publication date: November 15, 2018
    Inventors: Shwetabh VERMA, Bhaskar Banerjee, Amiad DVIR, Assaf NAOR
  • Patent number: 10033556
    Abstract: Methods, systems, and apparatuses are described for improving the signal integrity of a differential pair of signals by mitigating a non-balanced channel deficiency. For example, signal integrity may be improved by independently shaping and/or independently controlling the slopes (e.g., the rising edge and/or falling edge) of each signal of a differential pair of signals to counteract the effects caused by non-balanced deficiencies to provide a balanced differential pair of signals (i.e., signals having symmetrical impedances, loads, etc.).
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: July 24, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Shwetabh Verma, Bhaskar Banerjee, Amiad Dvir, Assaf Naor
  • Publication number: 20170104615
    Abstract: Methods, systems, and apparatuses are described for improving the signal integrity of a differential pair of signals by mitigating a non-balanced channel deficiency. For example, signal integrity may be improved by independently shaping and/or independently controlling the slopes (e.g., the rising edge and/or falling edge) of each signal of a differential pair of signals to counteract the effects caused by non-balanced deficiencies to provide a balanced differential pair of signals (i.e., signals having symmetrical impedances, loads, etc.).
    Type: Application
    Filed: October 3, 2016
    Publication date: April 13, 2017
    Inventors: Shwetabh Verma, Bhaskar Banerjee, Amiad Dvir, Assaf Naor
  • Patent number: 9118412
    Abstract: A system for performing in-band reflection analysis in a passive optical network. The system comprises an optical line terminal (OLT) that includes a transceiver for transmitting continuous downstream data modulated on a first wavelength and receiving upstream burst data modulated on a second wavelength, the OLT further includes a receiver for receiving signals reflected from the PON that are modulated on the first wavelength, wherein the continuous downstream data comprises user data and a test data pattern; and a reflection analysis unit for cross-correlating between a time-shifted version of the transmitted test data pattern and the reflected signals, wherein the test data pattern is time-shifted relatively for an optical location to be tested.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: August 25, 2015
    Assignee: Broadcom Corporation
    Inventors: Amiad Dvir, Assaf Naor
  • Patent number: 9118982
    Abstract: An optical line terminal (OLT) is operable in a passive optical network (PON). The OLT comprises a plurality of optical network units (ONUs), an electrical module for generating continuous downstream signal and processing received upstream burst signals according to a communication protocol of the PON and an optical module for transmitting continuous optical signals over a first wavelength and receiving burst optical signals over a second wavelength. The optical module further includes an ONU traffic processing module is electrically coupled to the optical module and the electrical module. The ONU traffic processing module is configured to emulate one of the ONUs of the PON. An interface is used for interfacing between the electrical module and the optical module.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: August 25, 2015
    Assignee: Broadcom Corporation
    Inventors: Amiad Dvir, Eliezer Weitz
  • Patent number: 9100128
    Abstract: A method for enabling AC coupling or DC coupling when receiving burst data signals comprises generating a hold-over pattern, wherein the hold-over pattern is a AC balanced pattern when an AC coupling is required and a low-logic value signal when a DC coupling is required; inputting the generated hold-over pattern to an AC coupling circuit, when no burst data signal is received; inputting only a received burst data signal to the AC coupling circuit, during the reception of such signal; and upon receiving of the entire burst data signal, generating a reset signal causing to input the generated holdover pattern to an AC coupling circuit.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: August 4, 2015
    Assignee: Broadcom Corporation
    Inventor: Amiad Dvir
  • Patent number: 8923353
    Abstract: Systems and methods are provided for generating an accurate, stable measurement for a laser bias current. The average current and the extinction ratio are controlled using a dual control loop. The transfer function between the laser and a monitor photo diode (MPD) is characterized. A laser driver control module predicts the average power that will be measured using the MPD relative to the data being transmitted, and this information is used to control a laser driver.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 30, 2014
    Assignee: Broadcom Corporation
    Inventors: Amiad Dvir, Asaf Koren
  • Patent number: 8879594
    Abstract: Systems and methods are provided to efficiently manage power in a laser a driver of an optical network unit (ONU) of a passive optical network (PON). Using information from an allocation map, the expected next allocated schedule for a transmission can be determined. The driver can be efficiently powered down and powered up based on the time remaining between the end of the current burst and the beginning of the next expected burst so that power is not wasted while the laser has no data to transmit.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 4, 2014
    Assignee: Broadcom Corporation
    Inventors: Amiad Dvir, Eli Elmoalem, Assaf Koren
  • Patent number: 8873960
    Abstract: A method for detecting faults and their locations in an optical path between an optical line terminal (OLT) of and optical network units (ONUs) of a passive optical network (PON). The method comprises forming a maintenance optical link through the PON between the OLT and a collocated ONU, the OLT and its collocated ONU are each connected to an optical splitter; sending a ranging request from the OLT to the collocated ONU; in response to the ranging request, receiving, over the maintenance optical line, a ranging burst signal including at least a fault analysis detection pattern (FADP); and analyzing the FADP in the received signal by auto-correlating the FADP signal with an expected FADP signal, an uncorrelated event measured through the auto-correlation is indicative of a fault in the optical path of the PON and occurrence times of such events are indicative of the fault's location in the optical path.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: October 28, 2014
    Assignee: Broadcom Corporation
    Inventors: Amiad Dvir, Eli Elmoalem
  • Patent number: 8861962
    Abstract: A method for enabling alternating current (AC) coupling of high-speed burst data signals transmitted by an optical network unit (ONU). The method comprises generating a first data pattern to be sent to an optical transceiver through an AC coupling circuit, wherein the first data pattern is a direct current (DC) balanced pattern; generating a second data pattern to be sent to the optical transceiver through the AC coupling circuit, wherein the second data pattern is output prior to transmission of a high-speed burst data signal; and generating a third data pattern to be sent to the optical transceiver through the AC coupling circuit, wherein the third data pattern is output posterior to the transmission of the high-speed burst data signal.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: October 14, 2014
    Assignee: Broadcom Corporation
    Inventors: Amiad Dvir, Asaf Koren, David Avishai
  • Patent number: 8855491
    Abstract: A method for performing a protection in passive optical networks. The method comprises forming a protection maintenance link between an active optical line terminal (OLT) and a standby OLT; forming a synchronization link between the active OLT and the standby OLT; computing a base differential distance value; continuously measuring round trip time (RTT) values by the active OLT using the protection maintenance link; periodically sending at least RTT values calculated by the active OLT to the standby OLT over the synchronization link; and computing, by the standby OLT, a new RTT value based on at least a RTT value measured by the active OLT and a standby differential distance value, when a switch-over action is triggered, thereby allowing the standby OLT to serve optical network units (ONUs) in the PON without performing a ranging process.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: October 7, 2014
    Assignee: Broadcom Corporation
    Inventors: Eli Elmoalem, Amiad Dvir
  • Patent number: 8805183
    Abstract: An OLT operable in a PON and structured to perform OTDR measurements. The OLT comprises an electrical module for generating continuous downstream signals and processing received upstream burst signals according to a communication protocol of the PON; an optical module for transmitting continuous optical signals over a first wavelength, receiving optical upstream burst signals over a second wavelength, and transmitting optical upstream burst signals over a third wavelength, wherein the optical module further includes an ONU traffic processing module being electrically coupled to the optical module and the electrical module, wherein the ONU traffic processing module is configured to emulate one of a plurality of ONUs of the PON, to generate an analysis pattern to be transmitted as an optical upstream burst signal over a third wavelength, and analyze an analysis pattern received in an optical upstream burst signal for the purpose of performing the OTDR measurements.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: August 12, 2014
    Assignee: Broadcom Corporation
    Inventor: Amiad Dvir
  • Publication number: 20140119395
    Abstract: Systems and methods are provided for generating an accurate, stable measurement for a laser bias current. The average current and the extinction ratio are controlled using a dual control loop. The transfer function between the laser and a monitor photo diode (MPD) is characterized. A laser driver control module predicts the average power that will be measured using the MPD relative to the data being transmitted, and this information is used to control a laser driver.
    Type: Application
    Filed: March 15, 2013
    Publication date: May 1, 2014
    Applicant: Broadcom Corporation
    Inventors: Amiad DVIR, Assaf KOREN