Patents by Inventor Amine Kandalaft

Amine Kandalaft has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for designing and implementing packet processing products
    Patent number: 7724684
    Abstract: A system and method for allowing a user to create instructions for building a packet processing integrated circuit. The system includes a user interface for allowing a user to define a desired packet processing algorithm (4) using a plurality of discrete packet processing blocks (22, 24, 28, 30), each of the blocks corresponding to a portion of the desired packet processing algorithm (4). The system allows the user to define connections (10) between the plurality of packet processing blocks (22, 24, 28, 30). The system processes a plurality of packet processing blocks (22, 24, 28, 30) and the connections to provide a list of instructions in a hardware description language for producing an integrated circuit capable of executing the desired packet processing algorithm (19).
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: May 25, 2010
    Assignee: Modelware, Inc.
    Inventors: Vispi Cassod, Anthony Dalleggio, Amine Kandalaft
  • System and method for designing and implementing packet processing products
    Publication number: 20080291917
    Abstract: A system and method for allowing a user to create instructions for building a packet processing integrated circuit. The system includes a user interface for allowing a user to define a desired packet processing algorithm (4) using a plurality of discrete packet processing blocks (22, 24, 28, 30), each of the blocks corresponding to a portion of the desired packet processing algorithm (4). The system allows the user to define connections (10) between the plurality of packet processing blocks (22, 24, 28, 30). The system processes a plurality of packet processing blocks (22, 24, 28, 30) and the connections to provide a list of instructions in a hardware description language for producing an integrated circuit capable of executing the desired packet processing algorithm (19).
    Type: Application
    Filed: May 24, 2007
    Publication date: November 27, 2008
    Inventors: Vispi Cassod, Anthony Dalleggio, Amine Kandalaft