Abstract: The present invention evaluates the power dissipation of an electronic circuit. A power dissipation value is calculated for each transition or event generated during the electronic simulation of an electronic circuit design that corresponds to an actual electronic circuit. The present invention relies on data that includes an electronic circuit design description of the electronic circuit, such as a gate level netlist; a cell library having a power model corresponding to a cell instance; cell activity data such as net transitions; and the total effective load seen by each cell pin of the logic cell to be evaluated for power. The power model includes simple arcs (transition delay values, energy per arc values, cell input capacitances, and output slew rate values) and power evaluation data.