Abstract: Aspects of the disclosed technology include techniques and mechanisms for correcting uncorrectable memory errors in DIMMs using erasure code. An uncorrectable error may be detected as a result of a read transaction on a memory address within a DRAM device on a DIMM. The data stored in the memory address may be inverted to produce reference data and the reference data may be written back to the memory address. A subsequent read transaction may be executed on the memory address, and the data read from the memory address may be compared to the reference data written to the memory address. Based on determining the data read from the memory address is different from the reference data written to the memory address, the data within the memory address may be corrected using erasure code capability and the corrected data may be written back to the memory address.

Abstract: Aspects of the disclosed technology include techniques and mechanisms for correcting uncorrectable memory errors in DIMMs using erasure code. An uncorrectable error may be detected as a result of a read transaction on a memory address within a DRAM device on a DIMM. The data stored in the memory address may be inverted to produce reference data and the reference data may be written back to the memory address. A subsequent read transaction may be executed on the memory address, and the data read from the memory address may be compared to the reference data written to the memory address. Based on determining the data read from the memory address is different from the reference data written to the memory address, the data within the memory address may be corrected using erasure code capability and the corrected data may be written back to the memory address.