Patents by Inventor Amir Salehi
Amir Salehi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8701966Abstract: The described embodiment relates generally to the field of inductive bonding. More specifically an inductive heater designed for use in assembling electronics is disclosed. A number of methods for shaping a magnetic field are disclosed for the purpose of completing an inductive bonding process without causing harm to unshielded adjacent electrical components.Type: GrantFiled: January 24, 2013Date of Patent: April 22, 2014Assignee: Apple Inc.Inventors: Michael Nikkhoo, Amir Salehi
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Patent number: 8650744Abstract: A process for assembling a rigid-flex printed circuit board (PCB) is presented. During operation, the process receives rigid-flex PCBs that are to be coupled together, wherein a rigid-flex PCB includes flexible PCBs coupled to rigid PCBs. The process then places the PCBs onto a carrier which is configured to: align the PCBs so that bond regions located on the flexible PCBs overlap with bond regions located on corresponding flexible PCBs, and apply pressure to the overlapped bond regions. The process then sends the carrier through a reflow oven which reflows solder on the PCBs so that the components become mechanically and electrically coupled to the PCBs. The temperature profile generated by the reflow oven and the pressure applied by the carrier cures and sets an anisotropic conductive film located in the bond regions so that the overlapped flexible PCBs become mechanically and electrically coupled together.Type: GrantFiled: February 17, 2010Date of Patent: February 18, 2014Assignee: Apple Inc.Inventors: Michael N. Rosenblatt, Amir Salehi
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Patent number: 8633403Abstract: This is directed to methods and apparatus for shielding a circuitry region of an electronic device from interference (e.g., EMI). A conductive dam may be formed about a periphery of the circuitry region. A non-conductive or electrically insulating fill may then be applied to the circuitry region within the dam. Next, a conductive cover may be applied above the fill. The cover may be electrically coupled to the dam. The dam may include two or more layers of conductive material stacked on top of one another. In some embodiments, the conductive cover may be pad printed or screen printed above the fill. In other embodiments, the conductive cover may be a conductive tablet that is melted above the fill.Type: GrantFiled: October 11, 2011Date of Patent: January 21, 2014Assignee: Apple Inc.Inventors: Gloria Lin, Wyeman Chen, Michael Nikkhoo, Michael Rosenblatt, Hammid Mahammadinia, Ziv Wolkowicki, Amir Salehi
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Patent number: 8488331Abstract: Electrical components, such as packaged integrated circuit devices that are mountable on a substrate surface, are provided with at least one exposed electrical contact on a side surface of the component that will be substantially perpendicular to the substrate surface when the component is mounted. Two such components can be mounted side-by-side on the substrate surface with the above-mentioned contacts close to one another between the above-mentioned side surfaces. An electrical connection between the contacts can be made (or perfected) by depositing an electrically conductive connector material in contact with both of the contacts between the above-mentioned side surfaces.Type: GrantFiled: May 12, 2011Date of Patent: July 16, 2013Assignee: Apple Inc.Inventors: Michael Rosenblatt, Amir Salehi
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Patent number: 8436636Abstract: Methods and apparatuses for testing circuit boards having side mounted test pads are described here. In one aspect of the invention, a test method includes applying test probes to test pads located on at least one side plane of a circuit board. The test method further includes testing components of the circuit board by applying electrical signals to the test pads that are each coupled to at least one of a plurality of conductive members coupled to the circuit board.Type: GrantFiled: October 10, 2006Date of Patent: May 7, 2013Assignee: Apple Inc.Inventors: Amir Salehi, Reese Cutler, David Reha
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Patent number: 8362793Abstract: Circuit boards are provided that include a functional portion and at least one removable test point portion. The removable test point portion may include test points which are accessed to verify whether the functional portion is operating properly or whether installed electronic components are electrically coupled to the board. If multiple boards are manufactured together on a single panel (in which the individual boards are broken off), the test points can be placed on bridges (e.g., removable portions) that connect the individual boards together during manufacturing and testing. Configurable test boards are also provided that can be adjusted to accommodate circuit boards of different size and electrical testing requirements. Methods and systems for testing these circuit boards are also provided.Type: GrantFiled: October 9, 2007Date of Patent: January 29, 2013Assignee: Apple Inc.Inventors: Michael Rosenblatt, W. Bryson Gardner, Jr., Amir Salehi, Tony Aghazarian
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Publication number: 20120320558Abstract: Electronic components on a substrate may be shielded using electromagnetic shielding structures. Insulating materials may be used to provide structural support and to help prevent electrical shorting between conductive materials and the components. The shielding structures may include compartments formed using metal fences that surround selected components or by injection molding plastic. The shielding structures may be formed using metal foil wrapped over the components and the substrate. Electronic components may be tested using test posts or traces to identify components that are faulty. The test posts or traces may be deposited on the substrate and may be used to convey test signals between test equipment and the components. After successful testing, the test posts may be permanently shielded. Alternatively, temporary shielding structures may be used to allow testing of individual components before an electronic device is fully assembled.Type: ApplicationFiled: June 4, 2012Publication date: December 20, 2012Inventors: James H. Foster, James W. Bilanski, Amir Salehi, Ramamurthy Chandhrasekhar, Nicholas Unger Webb
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Patent number: 8334704Abstract: This relates to systems and methods for providing a system-on-a-substrate. In some embodiments, the necessary components for an entire system (e.g., a processor, memory, accelerometers, I/O circuitry, or any other suitable components) can be fabricated on a single microchip in “bare die” form. The die can, for example, be coupled to suitable flash memory through a substrate and flexible printed circuit board (“flex”). In some embodiments, the flex can extend past the substrate, die, or both, to allow additional, relatively large components to be coupled to the flex. In some embodiments, the die can be coupled to the flash memory through the flex and without a substrate. In some embodiments, component test points can be placed on the flash memory side of the substrate.Type: GrantFiled: September 23, 2009Date of Patent: December 18, 2012Assignee: Apple Inc.Inventors: Gloria Lin, Bryson Gardner, Jr., Joseph Fisher, Jr., Dave Goh, Barry Corlett, Dennis Pyper, Amir Salehi
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Patent number: 8310835Abstract: This relates to systems and methods for providing one or more vias through a module of an electrical system. For example, in some embodiments, the module can include one or more passive and/or active elements of the electrical system around which a packaging has been plastic molded. The module can be stacked under another component of the electrical system. Vias can then be provided that extend through the module. The vias can include, for example, electrically conductive pathways. In this manner, the vias can provide electrical pathways for coupling the component stacked on top of the module to other entities of an electronic device including the electrical system. For example, the component can be coupled to other entities such as other components, other modules, printed circuit boards, other electrical systems, or to any other suitable entity.Type: GrantFiled: April 28, 2010Date of Patent: November 13, 2012Assignee: Apple Inc.Inventors: Gloria Lin, Bryson Gardner, Jr., Joseph Fisher, Jr., Dennis Pyper, Amir Salehi
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Publication number: 20120024588Abstract: This is directed to methods and apparatus for shielding a circuitry region of an electronic device from interference (e.g., EMI). A conductive dam may be formed about a periphery of the circuitry region. A non-conductive or electrically insulating fill may then be applied to the circuitry region within the dam. Next, a conductive cover may be applied above the fill. The cover may be electrically coupled to the dam. The dam may include two or more layers of conductive material stacked on top of one another. In some embodiments, the conductive cover may be pad printed or screen printed above the fill. In other embodiments, the conductive cover may be a conductive tablet that is melted above the fill.Type: ApplicationFiled: October 11, 2011Publication date: February 2, 2012Applicant: APPLE INC.Inventors: Gloria Lin, Wyeman Chen, Michael Nikkhoo, Michael Rosenblatt, Hammid Mohammadinia, Ziv Wolkowicki, Amir Salehi
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Publication number: 20120023743Abstract: This is directed to methods and apparatus for shielding a circuitry region of an electronic device from interference (e.g., EMI). A conductive dam may be formed about a periphery of the circuitry region. A non-conductive or electrically insulating fill may then be applied to the circuitry region within the dam. Next, a conductive cover may be applied above the fill. The cover may be electrically coupled to the dam. The dam may include two or more layers of conductive material stacked on top of one another. In some embodiments, the conductive cover may be pad printed or screen printed above the fill. In other embodiments, the conductive cover may be a conductive tablet that is melted above the fill.Type: ApplicationFiled: October 11, 2011Publication date: February 2, 2012Applicant: APPLE INC.Inventors: Gloria Lin, Wyeman Chen, Michael Nikkhoo, Michael Rosenblatt, Hammid Mohammadinia, Ziv Wolkowicki, Amir Salehi
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Patent number: 8071893Abstract: This is directed to methods and apparatus for shielding a circuitry region of an electronic device from interference (e.g., EMI). A conductive dam may be formed about a periphery of the circuitry region. A non-conductive or electrically insulating fill may then be applied to the circuitry region within the dam. Next, a conductive cover may be applied above the fill. The cover may be electrically coupled to the dam. The dam may include two or more layers of conductive material stacked on top of one another. In some embodiments, the conductive cover may be pad printed or screen printed above the fill. In other embodiments, the conductive cover may be a conductive tablet that is melted above the fill.Type: GrantFiled: March 4, 2009Date of Patent: December 6, 2011Assignee: Apple Inc.Inventors: Gloria Lin, Wyeman Chen, Michael Nikkhoo, Michael Rosenblatt, Hammid Mohammadinia, Ziv Wolkowicki, Amir Salehi
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Publication number: 20110216517Abstract: Electrical components, such as packaged integrated circuit devices that are mountable on a substrate surface, are provided with at least one exposed electrical contact on a side surface of the component that will be substantially perpendicular to the substrate surface when the component is mounted. Two such components can be mounted side-by-side on the substrate surface with the above-mentioned contacts close to one another between the above-mentioned side surfaces. An electrical connection between the contacts can be made (or perfected) by depositing an electrically conductive connector material in contact with both of the contacts between the above-mentioned side surfaces.Type: ApplicationFiled: May 12, 2011Publication date: September 8, 2011Applicant: APPLE INC.Inventors: Michael Rosenblatt, Amir Salehi
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Patent number: 7957153Abstract: Electrical components, such as packaged integrated circuit devices that are mountable on a substrate surface, are provided with at least one exposed electrical contact on a side surface of the component that will be substantially perpendicular to the substrate surface when the component is mounted. Two such components can be mounted side-by-side on the substrate surface with the above-mentioned contacts close to one another between the above-mentioned side surfaces. An electrical connection between the contacts can be made (or perfected) by depositing an electrically conductive connector material in contact with both of the contacts between the above-mentioned side surfaces.Type: GrantFiled: January 3, 2008Date of Patent: June 7, 2011Assignee: Apple Inc.Inventors: Michael Rosenblatt, Amir Salehi
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Publication number: 20110013373Abstract: This relates to systems and methods for providing one or more vias through a module of an electrical system. For example, in some embodiments, the module can include one or more passive elements and/or active of the electrical system around which a packaging has been plastic molded. The module can be stacked under another component of the electrical system. Vias can then be provided that extend through the module. The vias can include, for example, electrically conductive pathways. In this manner, the vias can provide electrical pathways for coupling the component stacked on top of the module to other entities of an electronic device including the electrical system. For example, the component can be coupled to other entities such as other components, other modules, printed circuit boards, other electrical systems, or to any other suitable entity.Type: ApplicationFiled: April 28, 2010Publication date: January 20, 2011Applicant: Apple Inc.Inventors: Gloria Lin, Bryson Gardner, JR., Joseph Fisher, JR., Dennis Pyper, Amir Salehi
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Patent number: 7838418Abstract: Embodiments of a method for applying a thermal-interface material are described. During this method, a first surface of a heat-removal device and a second surface of a semiconductor die are prepared. Next, a region on a given surface, which is at least one of the first surface and the second surface, is defined. Then, the thermal-interface material is applied to at least the region, where the thermal-interface material includes a material that is a liquid metal over a range of operating temperatures of the semiconductor die.Type: GrantFiled: December 11, 2007Date of Patent: November 23, 2010Assignee: Apple Inc.Inventors: Michael D. Hillman, Gregory L. Tice, Oscar Woo, Amir Salehi, Richard Lidio Blanco, Jr., Ronald J. Smith, Sean A. Bailey, Anwyl M. McDonald, Clayton R. Anderson, James M. Crowder, Jeffrey J. Van Norden, Jonathan N. Urquhart
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Publication number: 20100224401Abstract: This is directed to methods and apparatus for shielding a circuitry region of an electronic device from interference (e.g., EMI). A conductive dam may be formed about a periphery of the circuitry region. A non-conductive or electrically insulating fill may then be applied to the circuitry region within the dam. Next, a conductive cover may be applied above the fill. The cover may be electrically coupled to the dam. The dam may include two or more layers of conductive material stacked on top of one another. In some embodiments, the conductive cover may be pad printed or screen printed above the fill. In other embodiments, the conductive cover may be a conductive tablet that is melted above the fill.Type: ApplicationFiled: March 4, 2009Publication date: September 9, 2010Applicant: Apple Inc.Inventors: Gloria Lin, Wyeman Chen, Michael Nikkhoo, Michael Rosenblatt, Hammid Mohammadinia, Ziv Wolkowicki, Amir Salehi
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Publication number: 20100213958Abstract: This relates to systems and methods for providing a system-on-a-substrate. In some embodiments, the necessary components for an entire system (e.g., a processor, memory, accelerometers, I/O circuitry, or any other suitable components) can be fabricated on a single microchip in “bare die” form. The die can, for example, be coupled to suitable flash memory through a substrate and flexible printed circuit board (“flex”). In some embodiments, the flex can extend past the substrate, die, or both, to allow additional, relatively large components to be coupled to the flex. In some embodiments, the die can be coupled to the flash memory through the flex and without a substrate. In some embodiments, component test points can be placed on the flash memory side of the substrate.Type: ApplicationFiled: September 23, 2009Publication date: August 26, 2010Applicant: Apple Inc.Inventors: Gloria Lin, Bryson Gardner, JR., Joseph Fisher, JR., Dave Goh, Barry Corlett, Dennis Pyper, Amir Salehi
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Publication number: 20100139085Abstract: A process for assembling a rigid-flex printed circuit board (PCB) is presented. During operation, the process receives rigid-flex PCBs that are to be coupled together, wherein a rigid-flex PCB includes flexible PCBs coupled to rigid PCBs. The process then places the PCBs onto a carrier which is configured to: align the PCBs so that bond regions located on the flexible PCBs overlap with bond regions located on corresponding flexible PCBs, and apply pressure to the overlapped bond regions. The process then sends the carrier through a reflow oven which reflows solder on the PCBs so that the components become mechanically and electrically coupled to the PCBs. The temperature profile generated by the reflow oven and the pressure applied by the carrier cures and sets an anisotropic conductive film located in the bond regions so that the overlapped flexible PCBs become mechanically and electrically coupled together.Type: ApplicationFiled: February 17, 2010Publication date: June 10, 2010Applicant: APPLE INC.Inventors: Michael N. Rosenblatt, Amir Salehi
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Patent number: 7690104Abstract: A process for assembling a rigid-flex printed circuit board (PCB) is presented. During operation, the process receives rigid-flex PCBs that are to be coupled together, wherein a rigid-flex PCB includes flexible PCBs coupled to rigid PCBs. The process then places the PCBs onto a carrier which is configured to: align the PCBs so that bond regions located on the flexible PCBs overlap with bond regions located on corresponding flexible PCBs, and apply pressure to the overlapped bond regions. The process then sends the carrier through a reflow oven which reflows solder on the PCBs so that the components become mechanically and electrically coupled to the PCBs. The temperature profile generated by the reflow oven and the pressure applied by the carrier cures and sets an anisotropic conductive film located in the bond regions so that the overlapped flexible PCBs become mechanically and electrically coupled together.Type: GrantFiled: April 4, 2008Date of Patent: April 6, 2010Assignee: Apple Inc.Inventors: Michael N. Rosenblatt, Amir Salehi