Abstract: A novel system and procedure for placement and validation of I/O pins within an ASIC package module. The system reads and a plurality of data files containing chip design, technology and package related information. The parsed data is stored in a single I/O assignment information database that functions to store and organize all the data from all chip design, technology and package files. Access to the database is controlled by three sets of keys, with each key in each set being unique. The three sets of keys include: pin name, package pin coordination and Controlled Collapse Chip Connection (C4) on a flip chip area array packaging or IO slot (i e. chip wire bond connection). A dynamic graphical view of the package pins is built using these three keys and the contents of the I/O assignment information database. Users enter pin assignments data and, in response, the system validates the data against a set (of technology constraints and updates the assignment database accordingly.