Abstract: According to one embodiment, a computer system is disclosed. The computer system includes a flash memory device, a serial peripheral interface (SPI) coupled to the flash memory device, a network controller coupled to the SPI; and a chipset coupled to the SPI. The chipset includes an arbiter to arbitrate between the network controller and the chipset for control of the SPI to access the flash memory device.

Abstract: Identity of software is authenticated with hardware on a system. The hardware may be accessible to the operating system, making the mechanisms available to software makers. The identity of the software may be authenticated using fundamental properties of the software itself, providing greater security than merely relying on transferable identifiers, for example, keys.

Abstract: Some embodiments of the invention include apparatus, systems, and methods to periodically power-down at least a portion of a network controller to improve power management. Other embodiments are described and claimed.

Abstract: Identity of software is authenticated with hardware on a system. The hardware may be accessible to the operating system, making the mechanisms available to software makers. The identity of the software may be authenticated using fundamental properties of the software itself, providing greater security than merely relying on transferable identifiers, for example, keys.

Abstract: According to one embodiment, a computer system is disclosed. The computer system includes a flash memory device, a serial peripheral interface (SPI) coupled to the flash memory device, a network controller coupled to the SPI; and a chipset coupled to the SPI. The chipset includes an arbiter to arbitrate between the network controller and the chipset for control of the SPI to access the flash memory device.

Abstract: In one embodiment, in response to receiving a notification to enter a packet filtering mode of operation for a NIC operating a link to a hub/switch in a normal mode of operation at one operating speed, a lower power consuming operating speed is re-negotiated with the hub/switch for the NIC to operate the link in the packet filtering mode. In another embodiment, another link to the hub/switch through another NIC is operated in the packet filtering mode at a lower power consuming speed, in place of the original link and NIC instead. In yet another embodiment, the lowest power consuming NIC among a number of jointly operating NICs is operated in the packet filtering mode, with the remaining NICs being shut down.

Abstract: An integrated circuit includes logic to process a received transport-protocol compliant packet. The logic is adapted to forward at least some portions of the packet so that the portions will be transmitted along an auxiliary bus. The portions are forwarded based, at least in part, on specific binary digital signals being provided in fixed, predetermined locations in the packet.