Patents by Inventor Amit Bansal

Amit Bansal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240415163
    Abstract: The present disclosure relates to a composition suitable for a flavored banding portion of a tamper-evidence, two-part capsule and to the tamper-evident, two-part capsule having a flavored banding portion. The composition suitable for the flavored capsule banding portion includes a gelling agent, a surfactant, and a flavor system including a sweetener and a flavor configured to provide a capsule band that is effective to provide tamper evidence to a two-part capsule.
    Type: Application
    Filed: June 16, 2023
    Publication date: December 19, 2024
    Inventors: Inderdeep BHATIA, Amit BANSAL, Kiran Kumar MUPPIREDDY, Carlos PAZ
  • Publication number: 20240352580
    Abstract: Exemplary semiconductor processing chambers may include a chamber body having sidewalls and a base. The chambers may include a pumping liner seated atop the chamber body. The pumping liner may at least partially define an annular pumping plenum and at least one exhaust aperture that fluidly couples the pumping plenum with an interior of the chamber body. The chambers may include a purge ring seated below the pumping liner. The purge ring may define an annular channel that extends about a body of the purge ring. The purge ring may define a gas inlet that is fluidly coupled with the annular channel. The purge ring may define purge ports that are disposed at different radial positions about the purge ring, each of the purge ports being aligned and in fluid communication with the pumping plenum. The chambers may include a purge gas source coupled with the gas inlet.
    Type: Application
    Filed: April 19, 2023
    Publication date: October 24, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Zaoyuan Ge, Prasath Poomani, Yin Xiong, Ajit Laxman Kulkarni, Sungwon Ha, Amit Bansal, Abdul Aziz Khaja, Sarah Michelle Bobek, Badri N. Ramamurthi
  • Patent number: 12060637
    Abstract: Exemplary semiconductor processing systems include a processing chamber defining a processing region. The semiconductor processing systems may include a foreline coupled with the processing chamber. The foreline may define a fluid conduit. The semiconductor processing systems may include a foreline trap coupled with a distal end of the foreline. The semiconductor processing systems may include a removable insert provided within an interior of the foreline trap. The semiconductor processing systems may include a throttle valve coupled with the foreline trap downstream of the removable insert.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: August 13, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Gaosheng Fu, Tuan A Nguyen, Amit Bansal, Karthik Janakiraman, Juan Carlos Rocha-Alvarez
  • Patent number: 12050972
    Abstract: Machine learning models are powerful artificial intelligence tools that can make determinations based on a variety of factors. Unlike a simple linear model, however, determining the contribution of each variable to the outcome of a machine learning model is a challenging task. It may be unclear which factors contributed heavily toward a particular outcome of the machine learning model and which factors did not have a major effect on the outcome. Being able to accurately determine the underlying causative factors for a machine learning-based decision, however, can be important in several contexts. The present disclosure describes techniques that allow for training and use of non-linear machine learning models, while also preserving causal information for outputs of the models. Relative weight calculations for machine learning model variables can be used to accomplish this, in various embodiments.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: July 30, 2024
    Assignee: PAYPAL, INC.
    Inventors: Amit Bansal, Thomas Rosati, Tittu Thomas Nellimoottil
  • Publication number: 20240247371
    Abstract: A processing chamber may include a gas distribution member, a substrate support, and a pumping liner. The gas distribution member and the substrate support may at least in part define a processing volume. The pumping liner may define an internal volume in fluid communication with the processing volume via a plurality of apertures of the pumping liner circumferentially disposed about the processing volume. The processing chamber may further include a flow control mechanism operable to direct fluid flow from the internal volume of the pumping liner into the processing volume via a subset of the plurality of apertures of the pumping liner during fluid distribution into the processing volume from the gas distribution member.
    Type: Application
    Filed: April 3, 2024
    Publication date: July 25, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Nitin Pathak, Yuxing Zhang, Tuan A. Nguyen, Kalyanjit Ghosh, Amit Bansal, Juan Carlos Rocha-Alvarez
  • Patent number: 11952660
    Abstract: A processing chamber may include a gas distribution member, a substrate support, and a pumping liner. The gas distribution member and the substrate support may at least in part define a processing volume. The pumping liner may define an internal volume in fluid communication with the processing volume via a plurality of apertures of the pumping liner circumferentially disposed about the processing volume. The processing chamber may further include a flow control mechanism operable to direct fluid flow from the internal volume of the pumping liner into the processing volume via a subset of the plurality of apertures of the pumping liner during fluid distribution into the processing volume from the gas distribution member.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: April 9, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Nitin Pathak, Yuxing Zhang, Tuan A. Nguyen, Kalyanjit Ghosh, Amit Bansal, Juan Carlos Rocha-Alvarez
  • Patent number: 11952663
    Abstract: Exemplary semiconductor processing chambers may include a substrate support including a top surface. A peripheral edge region of the top surface may be recessed relative to a medial region of the top surface. The chambers may include a pumping liner disposed about an exterior surface of the substrate support. The chambers may include a liner disposed between the substrate support and the pumping liner. The liner may be spaced apart from the exterior surface to define a purge lumen between the liner and the substrate support. The chambers may include an edge ring seated on the peripheral edge region. The edge ring may extend beyond a peripheral edge of the substrate support and above a portion of the liner. A gap may be formed between a bottom surface of the edge ring and a top surface of the liner. The gap and the purge lumen may be fluidly coupled.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: April 9, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Nitin Pathak, Tuan A. Nguyen, Amit Bansal, Badri N. Ramamurthi, Thomas Rubio, Juan Carlos Rocha-Alvarez
  • Patent number: 11862475
    Abstract: A semiconductor processing system includes a remote plasma source (RPS), a faceplate, and an output manifold positioned between the RPS and the faceplate. The output manifold is characterized by a plurality of purge outlets that are fluidly coupled with a purge gas source and a plurality of deposition outlets that are fluidly coupled with a deposition gas source. A delivery tube extends between and fluidly couples the RPS and the faceplate. The delivery tube is characterized by a generally cylindrical sidewall that defines an upper plurality of apertures that are arranged in a radial pattern. Each of the upper apertures is fluidly coupled with one of the purge outlets. The generally cylindrical sidewall defines a lower plurality of apertures that are arranged in a radial pattern and below the upper plurality of apertures. Each of the lower apertures is fluidly coupled with one of the deposition outlets.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: January 2, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Fang Ruan, Diwakar Kedlaya, Amit Bansal, Venkata Sharat Chandra Parimi, Rajaram Narayanan, Badri N. Ramamurthi, Sherry L. Mings, Job George Konnoth Joseph, Rupankar Choudhury
  • Publication number: 20230402261
    Abstract: Exemplary semiconductor processing systems may include an output manifold that defines at least one plasma outlet. The systems may include a gasbox disposed beneath the output manifold. The gasbox may include an inlet side facing the output manifold and an outlet side opposite the inlet side. The gasbox may include an inner wall that defines a central fluid lumen. The inner wall may taper outward from the inlet side to the outlet side. The systems may include an annular spacer disposed below the gasbox. An inner diameter of the annular spacer may be greater than a largest inner diameter of the central fluid lumen. The systems may include a faceplate disposed beneath the annular spacer. The faceplate may define a plurality of apertures extending through a thickness of the faceplate.
    Type: Application
    Filed: August 28, 2023
    Publication date: December 14, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Saket Rathi, Tuan A. Nguyen, Amit Bansal, Yuxing Zhang, Badri N. Ramamurthi, Nitin Pathak, Abdul Aziz Khaja, Sarah Michelle Bobek
  • Publication number: 20230392259
    Abstract: Exemplary semiconductor processing chambers may include a substrate support including a top surface. A peripheral edge region of the top surface may be recessed relative to a medial region of the top surface. The chambers may include a pumping liner disposed about an exterior surface of the substrate support. The chambers may include a liner disposed between the substrate support and the pumping liner. The liner may be spaced apart from the exterior surface to define a purge lumen between the liner and the substrate support. The chambers may include an edge ring seated on the peripheral edge region. The edge ring may extend beyond a peripheral edge of the substrate support and above a portion of the liner. A gap may be formed between a bottom surface of the edge ring and a top surface of the liner. The gap and the purge lumen may be fluidly coupled.
    Type: Application
    Filed: May 8, 2023
    Publication date: December 7, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Nitin Pathak, Tuan A. Nguyen, Amit Bansal, Badri N. Ramamurthi, Thomas Rubio, Juan Carlos Rocha-Alvarez
  • Patent number: 11742185
    Abstract: Exemplary semiconductor processing systems may include an output manifold that defines at least one plasma outlet. The systems may include a gasbox disposed beneath the output manifold. The gasbox may include an inlet side facing the output manifold and an outlet side opposite the inlet side. The gasbox may include an inner wall that defines a central fluid lumen. The inner wall may taper outward from the inlet side to the outlet side. The systems may include an annular spacer disposed below the gasbox. An inner diameter of the annular spacer may be greater than a largest inner diameter of the central fluid lumen. The systems may include a faceplate disposed beneath the annular spacer. The faceplate may define a plurality of apertures extending through a thickness of the faceplate.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: August 29, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Saket Rathi, Tuan A. Nguyen, Amit Bansal, Yuxing Zhang, Badri N. Ramamurthi, Nitin Pathak, Abdul Aziz Khaja, Sarah Michelle Bobek
  • Patent number: 11699577
    Abstract: Exemplary methods of treating a chamber may include delivering a cleaning precursor to a remote plasma unit. The methods may include forming a plasma of the cleaning precursor. The methods may include delivering plasma effluents of the cleaning precursor to a processing region of a semiconductor processing chamber. The processing region may be defined by one or more chamber components. The one or more chamber components may include an oxide coating. The methods may include halting delivery of the plasma effluents. The methods may include treating the oxide coating with a hydrogen-containing material delivered to the processing region subsequent halting delivery of the plasma effluents.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: July 11, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Sarah Michelle Bobek, Ruiyun Huang, Abdul Aziz Khaja, Amit Bansal, Dong Hyung Lee, Ganesh Balasubramanian, Tuan Anh Nguyen, Sungwon Ha, Anjana M. Patel, Ratsamee Limdulpaiboon, Karthik Janakiraman, Kwangduk Douglas Lee
  • Patent number: 11682544
    Abstract: Semiconductor processing systems according to embodiments of the present technology may include a chamber body having sidewalls and a base. The chamber body may define an internal volume. The systems may include a substrate support assembly having a shaft and a platen coupled with the shaft along a first surface of the platen. The semiconductor processing systems may include a cover plate positioned on the platen of the substrate support assembly along a second surface of the platen opposite the first surface. The cover plate may include a flange extending about an exterior region of the cover plate. The flange may be in direct contact with the platen. The cover plate may include an upper wall vertically offset from the flange. An interior volume may be defined between the upper wall and the platen of the substrate support assembly.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: June 20, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Venkata Sharat Chandra Parimi, Satish Radhakrishnan, Diwakar Kedlaya, Fang Ruan, Amit Bansal
  • Publication number: 20230181577
    Abstract: The present invention relates to a pharmaceutical composition comprising Varenicline or its pharmaceutically acceptable salt with reduced amount of nitrosamine impurity and a process for preparing the same.
    Type: Application
    Filed: December 8, 2022
    Publication date: June 15, 2023
    Inventors: Naveen Kumar MAURYA, Jayanthy Venkata Vijaya Narasimha KISHAN, Vivek JAIN, Chithambaram MUTHULINGAM, Amit BANSAL, Anil KUMAR
  • Patent number: 11656366
    Abstract: An apparatus and a method for performing positioning using a Global Navigation Satellite System (GNSS) with a state machine based localization engine are provided. When the apparatus receives GNSS signals, the apparatus provides the localization engine to process the GNSS signals, and determines, based on a GNSS status and a position-velocity-time (PVT) status, a state of the localization engine. Specifically, the state of the localization engine is switchable between at least 3 states, including a dead reckoning state, a tightly coupling state, and a loosely coupling state. Once the state is determined, the localization engine may determine a local accuracy status based on the state of the localization engine. Thus, a downstream module on the apparatus may use the local accuracy status to perform a corresponding downstream action.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: May 23, 2023
    Assignee: GUANGZHOU XIAOPENG AUTOPILOT TECHNOLOGY CO., LTD.
    Inventors: Pengluo Wang, Hairuo Zhuang, Amit Bansal, Xue Li, Venkatesan Nallampatti Ekambaram, Vignesh Sethuraman
  • Patent number: 11643725
    Abstract: Exemplary semiconductor processing chambers may include a substrate support including a top surface. A peripheral edge region of the top surface may be recessed relative to a medial region of the top surface. The chambers may include a pumping liner disposed about an exterior surface of the substrate support. The chambers may include a liner disposed between the substrate support and the pumping liner. The liner may be spaced apart from the exterior surface to define a purge lumen between the liner and the substrate support. The chambers may include an edge ring seated on the peripheral edge region. The edge ring may extend beyond a peripheral edge of the substrate support and above a portion of the liner. A gap may be formed between a bottom surface of the edge ring and a top surface of the liner. The gap and the purge lumen may be fluidly coupled.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: May 9, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Nitin Pathak, Tuan A. Nguyen, Amit Bansal, Badri N. Ramamurthi, Thomas Rubio, Juan Carlos Rocha-Alvarez
  • Publication number: 20230120710
    Abstract: Exemplary processing chambers may include a body having sidewalls and a bottom plate. The bottom plate may define an exhaust opening and a gas inlet. The chambers may include a faceplate seated atop the body. The chambers may include a purge ring seated atop the bottom plate. The purge ring may include a ring body having an outer edge and an inner edge defining an open interior. The ring body may have a surface disposed against the bottom plate. The ring body may define an opening aligned with the exhaust opening. The surface may define a fluid port aligned and coupled with the gas inlet. The surface may define arcuate grooves extending into the fluid port. The arcuate grooves may be parallel with the inner and outer edges. The surface may define radial grooves extending from the open interior to an arcuate groove.
    Type: Application
    Filed: October 15, 2021
    Publication date: April 20, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Zaoyuan Ge, Yin Xiong, Sungwon Ha, Abdul Aziz Khaja, Amit Bansal, Prasath Poomani, Ajit Laxman Kulkarni, Sarah Michelle Bobek, Badri N. Ramamurthi
  • Patent number: 11580475
    Abstract: A device may receive historical risk data identifying historical risks associated with entities, and historical compliance data identifying historical compliance actions performed by the entities. The device may train a machine learning model with the historical risk data and the historical compliance data to generate a structured semantic model, and may receive entity risk data identifying new and existing risks associated with an entity. The device may receive entity compliance data identifying new and existing compliance actions performed by the entity, and may process the entity risk data and the entity compliance data, with the structured semantic model, to determine risk and compliance insights for the entity. The risk and compliance insights may include insights associated with a key performance indicator, a compliance issue, a regulatory issue, an operational risk, a compliance risk, or a qualification of controls. The device may perform actions based on the risk and compliance insights.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: February 14, 2023
    Assignee: Accenture Global Solutions Limited
    Inventors: San Retna, Tushant Nayyar, Amit Bansal, Rithesh Mohan, Rimon Nissan, Jennifer Pham
  • Patent number: 11550064
    Abstract: An apparatus and a method for providing a global localization output are provided. When the apparatus receives navigation signals, the apparatus processes the signals to determine, based on a fixed earth-centered, earth-fixed (ECEF) reference pose of a reference point in an ECEF coordinate, a new ECEF pose, and to convert the fixed ECEF reference pose to an east-north-up (ENU) reference pose in an ENU coordinate. When the apparatus determines that a jump occurs in the new ECEF pose based on a pose change between the new ECEF pose and a previous ECEF pose, the apparatus calculates a reference shift of the ENU reference pose based on the pose change to absorb the jump in the ENU coordinate, and updates the ENU reference pose based on the reference shift. Thus, a new ENU local pose may be obtained using the ENU reference pose.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: January 10, 2023
    Assignee: GUANGZHOU XIAOPENG AUTOPILOT TECHNOLOGY CO., LTD.
    Inventors: Hairuo Zhuang, Amit Bansal, Venkatesan Nallampatti Ekambaram, Vignesh Sethuraman
  • Publication number: 20230003904
    Abstract: An apparatus and a method for performing positioning using a Global Navigation Satellite System (GNSS) with a state machine based localization engine are provided. When the apparatus receives GNSS signals, the apparatus provides the localization engine to process the GNSS signals, and determines, based on a GNSS status and a position-velocity-time (PVT) status, a state of the localization engine. Specifically, the state of the localization engine is switchable between at least 3 states, including a dead reckoning state, a tightly coupling state, and a loosely coupling state. Once the state is determined, the localization engine may determine a local accuracy status based on the state of the localization engine. Thus, a downstream module on the apparatus may use the local accuracy status to perform a corresponding downstream action.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Inventors: Pengluo Wang, Hairuo Zhuang, Amit Bansal, Xue Li, Venkatesan Nallampatti Ekambaram, Vignesh Sethuraman