Abstract: Various implementations described herein are related to a device having multiple transistors that are arranged as a bitcell. The multiple transistors may include multiple P-type transistors that are arranged in a P-over-P stack configuration, and the multiple transistors may include multiple N-type transistors that are arranged in an N-over-N stack configuration.

Abstract: Various implementations described herein are related to a device having a multi-transistor structure for use in circuit architecture. The multi-transistor structure may have a multi-transistor stack of at least one of N-type transistors or P-type transistors that are arranged in a multi-device stack configuration. Also, a physical layout of the multi-device stack configuration may provide a common-centroid configuration for process mismatch cancellation in at least one of the X-Y-Z axes.

Abstract: Various implementations described herein are related to a device having a multi-device stack structure for use in multi-layered circuit architectures. The multi-device stack structure may have P-type transistors and N-type transistors that are arranged vertically in a multi-transistor stack configuration. In some implementations, the device may have a multi-device stack structure for use in multi-bit memory and/or logic architecture that is formed with complementary field effect transistor (CFET) technology.

Abstract: Various implementations described herein are directed to a device having a multi-bitcell structure with multiple bitcells. The multiple bitcells may include first port transistors and second port transistors. The first port transistors may be arranged in a P-over-N stack configuration, and the second port transistors may be arranged in an N-over-N stack configuration.

Abstract: Various implementations described herein refer to an integrated circuit having a first memory structure and a second memory structure. The first memory structure is disposed in a first area of the integrated circuit, and the first memory structure has first memory cells with first transistors. The second memory structure is disposed in a second area of the integrated circuit that is different than the first area, and the second memory structure has second memory cells with second transistors that are separate from the first transistors. The second transistors of the second memory cells are arranged to provide an output oscillating frequency for detecting variation of performance of the first transistors of the first memory cells.

Abstract: A lottery apparatus includes a programmed computer acting as a lottery control system which controls operation of the distribution of prizes to the purchasing customers from a lottery pool. The apparatus includes a plurality of typical instant win lottery tickets having a predetermined prize result taken from the pool together with a plurality of lottery cards which do not act as lottery tickets but instead include an activation code containing no information defining a prize and an access code which is used for entry by the customer into a digital experience provided by the lottery control system by which the customer accesses game information. The system, when the code is activated, assigns the result from the pool to the code and displays to the customer on a digital experience when accessed by the access code.

Abstract: Methods, systems, and computer-readable media for augmenting storage functionality using emulation of storage characteristics are disclosed. An access request for a data set is received. The access request is formatted according to a first protocol associated with a first data store, and the first data store is associated with first storage characteristics. The access request is translated into a translated access request. The translated access request is formatted according to a second protocol associated with a second data store, and the second data store is associated with second storage characteristics differing at least in part from the first storage characteristics. The translated access request is sent to the second data store. The translated access request is performed by the second data store on the data set using emulation of one or more of the first storage characteristics not included in the second storage characteristics.

Abstract: Various implementations described herein relate to a method for manufacturing, or causing to be manufactured, multiple devices packaged within a single semiconductor die. The multiple devices may have first devices that are arranged in a first multi-transistor stack with a first P-N configuration. The multiple devices may have second devices that are arranged in a second multi-transistor stack with a second P-N configuration that is different than the first P-N configuration.

Abstract: Techniques for providing multimedia content in a virtual set top system are described. In some embodiments, a stream switchover method for UI rendering is performed at a device (e.g., a server) with one or more processors and a non-transitory memory. The server distributes a first stream that includes a plurality of frames. The server receives a request for a user interface (UI) from a client. In response to receiving the request, the server generates a second stream by locating an encoder to encode the plurality of frames into the second stream based on the first stream, instructing the encoder to accelerate encoding of the plurality of frames and facilitating blending of the UI into the second stream with the plurality of frames. The server then switches the client from the first stream to the second stream.

Abstract: A method for identifying a logo within at least one image includes identifying an area containing the logo within the at least one image, extracting logo features from the area by analyzing image gradient vectors associated with the at least one image, and using a machine learning model to identify the logo from the extracted logo features, wherein the machine learning model is trained to identify at least one target logo based on a received image data containing the logo features.

Abstract: Various implementations described herein relate to a method for manufacturing, or causing to be manufactured, multiple devices packaged within a single semiconductor die. The multiple devices may have first devices that are arranged in a first multi-transistor stack with a first P-N configuration. The multiple devices may have second devices that are arranged in a second multi-transistor stack with a second P-N configuration that is different than the first P-N configuration.

Abstract: The present disclosure provides systems and methods for video content security and for detecting and preventing unauthorized playback. According to an exemplary method, a device performing a video playback can acquire a set of video frames from a decoder during the video playback, and generate, based on the set of video frames, a first video identifier. The first video identifier can be sent to a server. In response to the server determining that the first video identifier matches a second video identifier stored in the server, the device can receive a list of authorized playback sources associated with the second video identifier. The device can determine whether a source of the video playback is included in the list of authorized playback sources, and control the video playback based on the determination.

Abstract: Techniques for providing multimedia content in a virtual set top system are described. In some embodiments, a stream switchover method for UI rendering is performed at a device (e.g., a server) with one or more processors and a non-transitory memory. The server distributes a first stream that includes a plurality of frames. The server receives a request for a user interface (UI) from a client. In response to receiving the request, the server generates a second stream by locating an encoder to encode the plurality of frames into the second stream based on the first stream, instructing the encoder to accelerate encoding of the plurality of frames and facilitating blending of the UI into the second stream with the plurality of frames. The server then switches the client from the first stream to the second stream.

Abstract: Various implementations described herein relate to a device with a multi-transistor logic structure for use in memory architecture. In some applications, the multi-transistor logic structure may have a pair of P-type transistors that are arranged in a P-over-P multi-transistor stack. In other applications, the multi-transistor logic structure may have a pair of N-type transistors that are arranged in an N-over-N multi-transistor stack.

Abstract: Various implementations described herein relate to a method for manufacturing, or causing to be manufactured, multiple devices packaged within a single semiconductor die. The multiple devices may have first devices that are arranged in a first multi-transistor stack with a first P-N configuration. The multiple devices may have second devices that are arranged in a second multi-transistor stack with a second P-N configuration that is different than the first P-N configuration.

Abstract: Various implementations described herein are related to a device having multiple transistors in a single stack arranged as a cross-coupled bitcell latch. Also, the multiple transistors may be disposed in a multi-transistor stack configuration that is formed within a single monolithic semiconductor die. In some implementations, the multiple transistors may be arranged as a bitcell for single-port memory applications.

Abstract: Various implementations described herein are related to a device having multiple transistors that are arranged as a bitcell. The multiple transistors may include multiple P-type transistors that are arranged in a P-over-P stack configuration, and the multiple transistors may include multiple N-type transistors that are arranged in an N-over-N stack configuration.

Abstract: Methods, systems, and computer-readable media for augmenting storage functionality using emulation of storage characteristics are disclosed. An access request for a data set is received. The access request is formatted according to a first protocol associated with a first data store, and the first data store is associated with first storage characteristics. The access request is translated into a translated access request. The translated access request is formatted according to a second protocol associated with a second data store, and the second data store is associated with second storage characteristics differing at least in part from the first storage characteristics. The translated access request is sent to the second data store. The translated access request is performed by the second data store on the data set using emulation of one or more of the first storage characteristics not included in the second storage characteristics.

Abstract: Various implementations described herein refer to an integrated circuit having a first memory structure and a second memory structure. The first memory structure is disposed in a first area of the integrated circuit, and the first memory structure has first memory cells with first transistors. The second memory structure is disposed in a second area of the integrated circuit that is different than the first area, and the second memory structure has second memory cells with second transistors that are separate from the first transistors. The second transistors of the second memory cells are arranged to provide an output oscillating frequency for detecting variation of performance of the first transistors of the first memory cells.

Abstract: The present disclosure provides systems and methods for video content security and for detecting and preventing unauthorized playback. According to an exemplary method, a device performing a video playback can acquire a set of video frames from a decoder during the video playback, and generate, based on the set of video frames, a first video identifier. The first video identifier can be sent to a server. In response to the server determining that the first video identifier matches a second video identifier stored in the server, the device can receive a list of authorized playback sources associated with the second video identifier. The device can determine whether a source of the video playback is included in the list of authorized playback sources, and control the video playback based on the determination.