Patents by Inventor Amit Golander

Amit Golander has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150249618
    Abstract: A method of negotiating memory record ownership between network nodes, comprising: storing in a memory of a first network node a subset of a plurality of memory records and one of a plurality of file system segments of a file system mapping the memory records; receiving a request from a second network node to access a memory record of the memory records subset; identifying the memory record by using the file system segment; deciding, by a placement algorithm, whether to relocate the memory record, from the memory records subset to a second subset of the plurality of memory records stored in a memory of the second network node; when a relocation is not decided, providing remote access of the memory record via a network to the second network node; and when a relocation is decided, relocating the memory record via the network for management by the second network node.
    Type: Application
    Filed: March 2, 2015
    Publication date: September 3, 2015
    Inventor: Amit GOLANDER
  • Publication number: 20150248443
    Abstract: A method of accessing a memory record in distributed network storage, comprising: storing a plurality of memory records in a plurality of network nodes, each stores a file system segment of a file system mapping the memory records, each file system segment maps a subset of the memory records; receiving, by a storage managing module of a first network node, a request for accessing one of the memory records from an application executed in the first network node; querying a file system segment stored in the first network node for the memory record; when the memory record is missing, querying for an address of a second network node, wherein the memory record is stored in the second network node; and providing said first network node with an access to said memory record at said second network node via a network according to said address.
    Type: Application
    Filed: March 2, 2015
    Publication date: September 3, 2015
    Inventor: Amit GOLANDER
  • Publication number: 20150201016
    Abstract: A Computerized storage system management methods and system configurations. In some embodiments the invention comprises a computer storage data access structure, a DS management and a storage system solution related to methods and a system geared for implementing a scale-out NAS that can effectively utilize client side Flashes while the Flash utilization solution is based on pNFS, the pNFS is comprised of a meta-data server (MDS) and data servers (DSs). There are at least one client and two Data servers, wherein at least one of them is a Direct Attached (Tier0), client level DS. Tier0 DS is a client-side resident low latency memory selected from a group of solid state memories, defined as Storage Class Memories, such as a Flash memory, serving as an integral lowest level of a storage system with a shared storage hierarchy of levels (Tier 0, 1, 2 and so on) and the unified name space.
    Type: Application
    Filed: January 14, 2014
    Publication date: July 16, 2015
    Inventors: Amit GOLANDER, David FLYNN, Ben Zion HALEVY
  • Publication number: 20140379767
    Abstract: A method for gathering access data of a file stored in one or more storage devices of a parallel access network file system. The method comprises monitoring layout requests received from a plurality of clients of the parallel access network file system, each the layout request is for a layout of data segments of one of a plurality of data objects which are stored in a plurality of storage devices of a parallel access network file system, sending to the plurality of clients a plurality of recall requests to recall a plurality of layouts requested by the plurality of layout requests, monitoring a plurality of recurring layout requests for mapping data segments of at least some of the plurality of data objects from at least some of the plurality of clients, and updating access data of the plurality of data objects according to the plurality of recurring layout requests.
    Type: Application
    Filed: June 25, 2013
    Publication date: December 25, 2014
    Inventors: Ben Zion HALEVY, Amit GOLANDER
  • Patent number: 8918588
    Abstract: Techniques for replacing one or more blocks in a cache, the one or more blocks being associated with a plurality of data streams, are provided. The one or more blocks in the cache are grouped into one or more groups, each corresponding to one of the plurality of data streams. One or more incoming blocks are received. To free space, the one or more blocks of the one or more groups in the cache are invalidated in accordance with at least one of an inactivity of a given data stream corresponding to the one or more groups and a length of the one or more groups. The one or more incoming blocks are stored in the cache. A number of data streams maintained within the cache is maximized.
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Brian Bass, Giora Biran, Hubertus Franke, Amit Golander, Hao Yu
  • Patent number: 8850095
    Abstract: A novel and useful cost effective mechanism for detecting the livelock/starvation of transactions in a ring shaped interconnect that utilizes minimal logic resources. Rather than monitor all transactions concurrently in the ring, the mechanism monitors only a single transaction in the ring. A sampling point is located at a point in the ring which contains a set of N latches. If the monitored transaction is not being starved, it is released and the detection logic moves on the next candidate transaction in round robin fashion. If the monitored transaction passes the sampling point a threshold number of times, it is deemed to be starved and a starvation prevention handling procedure is activated. By traversing the entire ring a single transaction at a time, all starving transactions will eventually be detected with an upper limit on the detection time of O(N2).
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: September 30, 2014
    Assignee: International Business Machines Corporation
    Inventors: Amit Golander, Omer Heymann, Nadav Levison, Eric F. Robinson
  • Patent number: 8839256
    Abstract: A novel and useful system and method of improving the utilization of a special purpose accelerator in a system incorporating a general purpose processor. In some embodiments, the current queue status of the special purpose accelerator is periodically monitored using a background monitoring process/thread and the current queue status is stored in a shared memory. A shim redirection layer added a priori to a library function task determines at runtime and in user space whether to execute the library function task on the special purpose accelerator or the general purpose processor. At runtime, using the shim redirection layer and based on the current queue status, it is determined whether to execute the library function task on the special purpose accelerator or on the general purpose processor.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: September 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: Heather D. Achilles, Giora Biran, Amit Golander, Nancy A. Greco
  • Patent number: 8838544
    Abstract: A novel and useful system and method of fast history compression in a pipelined architecture with both speculation and low-penalty misprediction recovery. The method of the present invention speculates that a current input byte does not continue an earlier string, but either starts a new string or represents a literal (no match). As previous bytes are checked if they start a string, the method of the present invention detects if speculation for the current byte is correct. If speculation is not correct, then various methods of recovery are employed, depending on the repeating string length.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: September 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: Giora Biran, Amit Golander
  • Patent number: 8806292
    Abstract: A hybrid mechanism whereby hardware acceleration is combined with software such that the compression rate achieved is significantly increased while maintaining the original compression ratio (e.g., using full DHT and not SHT or an approximation). The compression acceleration mechanism is applicable to a hardware accelerator tightly coupled with the general purpose processor. The compression task is divided and parallelized between hardware and software wherein each compression task is split into two acceleration requests: a first request that performs SHT encoding using hardware acceleration and provides post-LZ frequency statistics; and a second request that performs SHT decoding and DHT encoding using the DHT generated in software.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: August 12, 2014
    Assignee: International Business Machines Corporation
    Inventors: Giora Biran, Amit Golander, Kiyoshi Nishino, Nobuyoshi Tanaka
  • Publication number: 20140149663
    Abstract: A method for presenting a plurality of storage resource pools, comprising: grouping a plurality of quotas of a plurality of storage volumes into at least one of a plurality of storage resource pools according to a plurality of storage volume characteristics technically describing said a plurality of quotas; associating between said plurality of storage volume characteristics and said plurality of storage resource pools; and generating a presentation indicative of said association; and wherein said presentation is presented to a user on a display of an electronic device.
    Type: Application
    Filed: November 25, 2013
    Publication date: May 29, 2014
    Applicant: Tonian Inc.
    Inventors: Amit GOLANDER, Yanay Zohar, Danit Segev, Douglas O'Flaherty
  • Publication number: 20140074899
    Abstract: A computerized method for efficient retirement process of an old controller in a computer network storage system. The method provides for combining legacy non-pNFS data storage with a new temporary parallel NFS data storage. In an embodiment, the method comprises a series of relatively short time consuming operations wherein a storage system efficiently migrates the stored data from the old controller storing legacy data stored solely under pNFS storage, wherein the efficient data migration implements the ability to reclaim layouts (pNFS, stand alone pNFS MDS) and redirect the old data to new controllers. In another embodiment the method comprises a sequence of operations under which a storage system efficiently migrates data from a storage controller that has non-pNFS data storage. In this embodiment the storage utilization during the retirement period combines both legacy non-pNFS storage, as well as new temporary pNFS storage space management.
    Type: Application
    Filed: February 28, 2013
    Publication date: March 13, 2014
    Inventors: Ben Zion Halevy, Amit GOLANDER
  • Patent number: 8610604
    Abstract: A system and method of selecting a predefined Huffman dictionary from a bank of dictionaries. The dictionary selection mechanism of the present invention effectively breaks the built-in tradeoff between compression ratio and compression rate for both hardware and software compression implementations. A mechanism is provided for automatically creating a predefined Huffman dictionary for a set of input files. The dictionary selection mechanism achieves high compression rate and ratio leveraging predefined Huffman dictionaries and provides a mechanism for dynamically speculating which predefined dictionary to select per input data block, thereby achieving close to a dynamic Huffman ratio at a static Huffman rate. In addition, a feedback loop is used to monitor the ongoing performance of the preset currently selected for use by the hardware accelerator. If the current preset is not optimal it is replaced with an optimal preset.
    Type: Grant
    Filed: November 24, 2011
    Date of Patent: December 17, 2013
    Assignee: International Business Machines Corporation
    Inventors: Lior Glass, Giora Biran, Amit Golander
  • Patent number: 8610606
    Abstract: A system and method of selecting a predefined Huffman dictionary from a bank of dictionaries. The dictionary selection mechanism of the present invention effectively breaks the built-in tradeoff between compression ratio and compression rate for both hardware and software compression implementations. A mechanism is provided for automatically creating a predefined Huffman dictionary for a set of input files. The dictionary selection mechanism achieves high compression rate and ratio leveraging predefined Huffman dictionaries and provides a mechanism for dynamically speculating which predefined dictionary to select per input data block, thereby achieving close to a dynamic Huffman ratio at a static Huffman rate. In addition, a feedback loop is used to monitor the ongoing performance of the preset currently selected for use by the hardware accelerator. If the current preset is not optimal it is replaced with an optimal preset.
    Type: Grant
    Filed: November 24, 2011
    Date of Patent: December 17, 2013
    Assignee: International Business Machines Corporation
    Inventors: Lior Glass, Giora Biran, Amit Golander
  • Publication number: 20130321180
    Abstract: A system and method of accelerating dynamic Huffman decompaction within the inflate algorithm. To improve the performance of a decompression engine during the inflate/decompression process, Huffman trees decompacted a priori are used thus eliminating the requirement of decompacting the DHT for each input stream. The Huffman tree in the input stream is matched prior to decompaction. If a match is found, the stored decompacted Huffman tree is used which reduces the required decompression time.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 5, 2013
    Applicant: International Business Machines Corporation
    Inventors: Giora Biran, Amit Golander, Shai Ishaya Tahar
  • Publication number: 20130325800
    Abstract: A computerized method for managing file migration in one or more storage devices. The method comprises separately categorizing a plurality of segments of a file stored in a pNFS storage according to at least one control data request received from at least one client in real time, receiving a request to migrate the file from at least one source storage location of the pNFS storage to at least one destination storage location of the pNFS storage, separately copying a plurality of different subsets of the file to the at least one destination storage location in a plurality of separate instances where in each the instance a respective the subset selected according to a respective the categorization, and deleting the file from the at least one source storage location.
    Type: Application
    Filed: May 23, 2013
    Publication date: December 5, 2013
    Applicant: Tonian Inc.
    Inventors: Ben Zion HALEVY, Amit GOLANDER
  • Patent number: 8593308
    Abstract: A system and method of accelerating dynamic Huffman decompaction within the inflate algorithm. To improve the performance of a decompression engine during the inflate/decompression process, Huffman trees decompacted a priori are used thus eliminating the requirement of decompacting the DHT for each input stream. The Huffman tree in the input stream is matched prior to decompaction. If a match is found, the stored decompacted Huffman tree is used which reduces the required decompression time.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: November 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Giora Biran, Amit Golander, Shai I Tahar
  • Patent number: 8542135
    Abstract: A system and method of selecting a predefined Huffman dictionary from a bank of dictionaries. The dictionary selection mechanism of the present invention effectively breaks the built-in tradeoff between compression ratio and compression rate for both hardware and software compression implementations. A mechanism is provided for automatically creating a predefined Huffman dictionary for a set of input files. The dictionary selection mechanism achieves high compression rate and ratio leveraging predefined Huffman dictionaries and provides a mechanism for dynamically speculating which predefined dictionary to select per input data block, thereby achieving close to a dynamic Huffman ratio at a static Huffman rate. In addition, a feedback loop is used to monitor the ongoing performance of the preset currently selected for use by the hardware accelerator. If the current preset is not optimal it is replaced with an optimal preset.
    Type: Grant
    Filed: November 24, 2011
    Date of Patent: September 24, 2013
    Assignee: International Business Machines Corporation
    Inventors: Amit Golander, Shai Ishaya Tahar
  • Publication number: 20130246761
    Abstract: Systems and methods are disclosed for sharing one or more registers in an extended processor architecture. The method comprises executing a first thread and a second thread on a processor core supported by an extended register file, wherein one or more registers in the extended register file are accessible by said first and second threads; loading first data for use by the first thread into a first set of physical registers mapped to a first set of logical registers associated with the first thread; and providing the first data for use by the second thread by maintaining the first data in the first set of physical registers and mapping set first set of physical registers to a second set of logical registers associated with the second thread.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 19, 2013
    Applicant: International Business Machines Corporation
    Inventors: Jeffrey H. Derby, Amit Golander, Sagi Manole
  • Publication number: 20130159811
    Abstract: A novel and useful hybrid mechanism whereby hardware acceleration is combined with software such that the compression rate achieved is significantly increased while maintaining the original compression ratio (e.g., using full DHT and not SHT or an approximation). The compression acceleration mechanism is applicable to a hardware accelerator tightly coupled with the general purpose processor. The compression task is divided and parallelized between hardware and software wherein each compression task is split into two acceleration requests: a first request that performs SHT encoding using hardware acceleration and provides post-LZ frequency statistics; and a second request that performs SHT decoding and DHT encoding using the DHT generated in software.
    Type: Application
    Filed: December 15, 2011
    Publication date: June 20, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Giora Biran, Amit Golander, Kiyoshi Nishino, Nobuyoshi Tanaka
  • Publication number: 20130151818
    Abstract: A method and system for improving performance and latency of instruction execution within an execution pipeline in a processor. The method includes finding, while decoding an instruction, a pointer register used by the instruction; reading the pointer register; validating a pointer register entry; reading, if the pointer register entry is valid, a register file entry; validating a register file entry; validating, if the register file entry is invalid, a valid register file entry wherein the valid register file entry is in the register file's future file; bypassing, if the valid register file entry is valid, a valid register file value from the register file's future file to the execution pipeline wherein the valid register file value is in the valid register file entry; and executing the instruction using the valid register file value; wherein at least one of the steps is carried out using a computer device.
    Type: Application
    Filed: December 13, 2011
    Publication date: June 13, 2013
    Applicant: International Business Machines Corporation
    Inventors: Erez Barak, Alejandro Rico Carro, Jeffrey H. Derby, Amit Golander, Omer Heymann, Nadav Levison, Sagi Manole, Robert K. Montoye