Abstract: Aspects of the present disclosure provide techniques and apparatus for safety monitoring of a vehicle control system. An example method of operating a vehicle includes detecting an error associated with a system-on-a-chip (SoC) having a main domain and a safety domain, wherein the main domain is coupled to a first bus for communicating with one or more electronic control units (ECUs) and wherein the safety domain is coupled to a second bus for communicating with the one or more ECUs; indicating the error to the one or more ECUs via at least one of the first bus, the second bus, or a power management integrated circuit (PMIC) in response to detecting the error, wherein the PMIC is configured to supply power to the main domain or the safety domain; and performing one or more actions in response to detecting the error.

Abstract: Techniques and apparatus for power supply monitoring in in-vehicle systems, such as advanced driver assistance systems (ADASs), in-vehicle infotainment (IVI) systems, and/or automated driving (AD) systems. One example method of power supply monitoring generally includes regulating power to a main domain of a system on a chip (SoC) using at least one main domain (MD) power management integrated circuit (PMIC); regulating power to a safety domain of the SoC using at least one safety domain (SD) PMIC; powering the at least one SD PMIC using a SD PMIC power supply rail; and monitoring the SD PMIC power supply rail using the at least one MD PMIC. For certain aspects, the method further includes powering the at least one MD PMIC using a MD PMIC power supply rail and monitoring the MD PMIC power supply rail using the at least one SD PMIC.

Abstract: Instructions embedded on a computer-readable medium, when executed on one or more computer devices, improve video coding performance while using a merge mode in motion estimation. The instructions comprise instructions to perform one or more refinement searches on a plurality of candidate regions of a current frame. The instructions also comprise instructions to determine one or more distortion values based, at least in part, on reduced candidate regions and instructions to code motion data based, at least in part, on the one or more refinement searches.

Abstract: A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.

Abstract: A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.

Abstract: A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.

Abstract: Stereoscopic video data and corresponding depth map data for stereoscopic and auto-stereoscopic displays are coded using a coded base layer and one or more coded enhancement layers. Given a 3D input picture and corresponding input depth map data, a side-by-side and a top-and-bottom picture are generated based on the input picture. Using an encoder, the side-by-side picture is coded to generate a coded base layer Using the encoder and a texture reference processing unit (RPU), the top-and-bottom picture is encoded to generate a first enhancement layer, wherein the first enhancement layer is coded based on the base layer stream, and using the encoder and a depth-map RPU, depth data for the side-by-side picture are encoded to generate a second enhancement layer, wherein the second enhancement layer is coded based on to the base layer. Alternative single, dual, and multi-layer depth map delivery systems are also presented.

Abstract: A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.

Abstract: A method operates within an integrated circuit device having a plurality of processing lanes. The method determines a first number of packs among one or more first packs associated with a first processing lane of the plurality of processing lanes, associates the first number of packs with a first used field of the first processing lane, determines a second number of packs among one or more second packs associated with a second processing lane of the plurality of processing lanes, and associates the second number of packs with a second used field of the second processing lane.

Abstract: Stereoscopic video data and corresponding depth map data for stereoscopic and auto-stereoscopic displays are coded using a coded base layer and one or more coded enhancement layers. Given a 3D input picture and corresponding input depth map data, a side-by-side and a top-and-bottom picture are generated based on the input picture. Using an encoder, the side-by-side picture is coded to generate a coded base layer Using the encoder and a texture reference processing unit (RPU), the top-and-bottom picture is encoded to generate a first enhancement layer, wherein the first enhancement layer is coded based on the base layer stream, and using the encoder and a depth-map RPU, depth data for the side-by-side picture are encoded to generate a second enhancement layer, wherein the second enhancement layer is coded based on to the base layer. Alternative single, dual, and multi-layer depth map delivery systems are also presented.

Abstract: A method operates within an integrated circuit device having a plurality of processing lanes. The method determines a first number of packs among one or more first packs associated with a first processing lane of the plurality of processing lanes, associates the first number of packs with a first used field of the first processing lane, determines a second number of packs among one or more second packs associated with a second processing lane of the plurality of processing lanes, and associates the second number of packs with a second used field of the second processing lane.

Abstract: Methods and devices for automated software testing. This includes identifying objects present in an application under test and identifying actions supported the objects present in application under test. Based on objects selected for testing, actions are also selected and some actions require input data to be received. Verification points, which are conditions for testing objects, are set. A test script is generated based on selected objects, actions and verification points.

Abstract: A method of estimating motion is disclosed. A first plurality of candidates is identified in a reference frame, wherein the total area occupied by the first plurality of candidates is substantially smaller than that of the reference frame. A first refinement search is then performed based, at least in part, on the first plurality of candidates. One or more best candidates are then identified based, at least in part, on the first refinement search. Finally, motion data is encoded based, at least in part, on the one or more best candidates.

Abstract: A method of estimating motion is disclosed. A first plurality of candidates is identified in a reference frame, wherein the total area occupied by the first plurality of candidates is substantially smaller than that of the reference frame. A first refinement search is then performed based, at least in part, on the first plurality of candidates. One or more best candidates are then identified based, at least in part, on the first refinement search. Finally, motion data is encoded based, at least in part, on the one or more best candidates.

Abstract: A method of assigning a buffer size in a video decoder includes the step of establishing a first buffer size for a scalable buffer. A video data stream is then processed with the scalable buffer configured to the first buffer size. A second buffer size is then selected for the scalable buffer. The video stream is then processed with the scalable buffer configured to the second buffer size. Memory utilization data characterizing memory performance during processing with the scalable buffer at the first buffer size and the second buffer size is then created. Afterwards, a buffer size is assigned for the scalable buffer in accordance with the memory utilization data.

Abstract: A method for pipelining variable length decode and inverse quantization operations in a hybrid motion-compensated and transform coded video decoder includes the step of mapping a new code word to a look-up table to retrieve a code word length, a zero-run length, and a quantized level. A new linear, zig-zagged position of a current coefficient is identified from the zero-run length and a previous zero-run length. The code word length is added to a current bitstream position to yield a new bitstream position. A quantization matrix coefficient from the new linear, zig-zagged position of the current coefficient is selected. The quantized level is multiplied by a predetermined value to produce a quantization product. In the case of inter block processing, a quantized level sign value is added to the quantization product. In the case of intra block processing, the quantization product does not include the quantization level sign.

Abstract: An apparatus for decoding a Motion Compensated-Discrete Cosine Transform (MC-DCT) video stream includes an input port to receive an MC-DCT video stream with an associated hierarchy of data structures including a sequence data structure, a picture data structure, a slice data structure, and a macroblock data structure. A monitor processor splits the MC-DCT video stream into a set of video streams. A set of sub-processors processes the set of video streams. Each sub-processor has an assigned computational task performed on a specified hierarchical level of the associated hierarchy of data structures. Each sub-processor performs the assigned computational task with a designated data structure including all parameter data required at the specified hierarchical level.