Patents by Inventor Amit KEDIA

Amit KEDIA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Efficient storage of error correcting code information
    Patent number: 11934269
    Abstract: Multiple independent point-to-point memory channels are operated, by at least one controller, in parallel to form a wider memory channel. The memory components on these point-to-point channels include the ability to connect to multiple (e.g., 2) instances of these independent memory channels. The controller operates multiple instances of the wider channels with the memory components configured in a clamshell mode. A single memory component is also operated in clamshell mode to provide error correction code information, independently of the other wider channels, to multiple instances of the wider memory channel.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: March 19, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Amit Kedia, Kartik Dayalal Kariya, Sreeja Menon, Steven C. Woo
  • EFFICIENT STORAGE OF ERROR CORRECTING CODE INFORMATION
    Publication number: 20230273857
    Abstract: Multiple independent point-to-point memory channels are operated, by at least one controller, in parallel to form a wider memory channel. The memory components on these point-to-point channels include the ability to connect to multiple (e.g., 2) instances of these independent memory channels. The controller operates multiple instances of the wider channels with the memory components configured in a clamshell mode. A single memory component is also operated in clamshell mode to provide error correction code information, independently of the other wider channels, to multiple instances of the wider memory channel.
    Type: Application
    Filed: February 16, 2023
    Publication date: August 31, 2023
    Inventors: Amit KEDIA, Kartik Dayalal KARIYA, Sreeja MENON, Steven C. WOO
  • Efficient storage of error correcting code information
    Patent number: 11609816
    Abstract: Multiple independent point-to-point memory channels are operated, by at least one controller, in parallel to form a wider memory channel. The memory components on these point-to-point channels include the ability to connect to multiple (e.g., 2) instances of these independent memory channels. The controller operates multiple instances of the wider channels with the memory components configured in a clamshell mode. A single memory component is also operated in clamshell mode to provide error correction code information, independently of the other wider channels, to multiple instances of the wider memory channel.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: March 21, 2023
    Assignee: Rambus Inc.
    Inventors: Amit Kedia, Kartik Dayalal Kariya, Sreeja Menon, Steven C. Woo
  • EFFICIENT STORAGE OF ERROR CORRECTING CODE INFORMATION
    Publication number: 20210240566
    Abstract: Multiple independent point-to-point memory channels are operated, by at least one controller, in parallel to form a wider memory channel. The memory components on these point-to-point channels include the ability to connect to multiple (e.g., 2) instances of these independent memory channels. The controller operates multiple instances of the wider channels with the memory components configured in a clamshell mode. A single memory component is also operated in clamshell mode to provide error correction code information, independently of the other wider channels, to multiple instances of the wider memory channel.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 5, 2021
    Inventors: Amit KEDIA, Kartik Dayalal KARIYA, Sreeja MENON, Steven C. WOO